94b912e428
SDMA supports device to device (per_2_per) scripts to handle DMA transfering between two peripheral devices. The per_2_per script, however, needs two dma requests from two sides while the current structure only defined one request. So this patch just simply adds the secondary request so as to let SDMA and its user to add its implementation later. [ Both change in the SDMA driver and its users like Freescale ASRC ASoC driver should be taken along with this change in order to truly support per_2_per sciprts. However, we here make an expediency by adding this first so that we can add either side later since this patch won't break any function and meanwhile it can make merge window more smoothly: we don't need to apply the change inside dmaengine branch via ASoC tree any more. -- Nicolin ] Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Mark Brown <broonie@linaro.org>
69 lines
1.9 KiB
C
69 lines
1.9 KiB
C
/*
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* Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_MXC_DMA_H__
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#define __ASM_ARCH_MXC_DMA_H__
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#include <linux/scatterlist.h>
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#include <linux/device.h>
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#include <linux/dmaengine.h>
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/*
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* This enumerates peripheral types. Used for SDMA.
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*/
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enum sdma_peripheral_type {
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IMX_DMATYPE_SSI, /* MCU domain SSI */
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IMX_DMATYPE_SSI_SP, /* Shared SSI */
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IMX_DMATYPE_MMC, /* MMC */
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IMX_DMATYPE_SDHC, /* SDHC */
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IMX_DMATYPE_UART, /* MCU domain UART */
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IMX_DMATYPE_UART_SP, /* Shared UART */
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IMX_DMATYPE_FIRI, /* FIRI */
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IMX_DMATYPE_CSPI, /* MCU domain CSPI */
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IMX_DMATYPE_CSPI_SP, /* Shared CSPI */
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IMX_DMATYPE_SIM, /* SIM */
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IMX_DMATYPE_ATA, /* ATA */
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IMX_DMATYPE_CCM, /* CCM */
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IMX_DMATYPE_EXT, /* External peripheral */
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IMX_DMATYPE_MSHC, /* Memory Stick Host Controller */
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IMX_DMATYPE_MSHC_SP, /* Shared Memory Stick Host Controller */
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IMX_DMATYPE_DSP, /* DSP */
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IMX_DMATYPE_MEMORY, /* Memory */
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IMX_DMATYPE_FIFO_MEMORY,/* FIFO type Memory */
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IMX_DMATYPE_SPDIF, /* SPDIF */
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IMX_DMATYPE_IPU_MEMORY, /* IPU Memory */
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IMX_DMATYPE_ASRC, /* ASRC */
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IMX_DMATYPE_ESAI, /* ESAI */
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IMX_DMATYPE_SSI_DUAL, /* SSI Dual FIFO */
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};
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enum imx_dma_prio {
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DMA_PRIO_HIGH = 0,
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DMA_PRIO_MEDIUM = 1,
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DMA_PRIO_LOW = 2
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};
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struct imx_dma_data {
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int dma_request; /* DMA request line */
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int dma_request2; /* secondary DMA request line */
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enum sdma_peripheral_type peripheral_type;
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int priority;
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};
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static inline int imx_dma_is_ipu(struct dma_chan *chan)
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{
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return !strcmp(dev_name(chan->device->dev), "ipu-core");
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}
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static inline int imx_dma_is_general_purpose(struct dma_chan *chan)
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{
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return !strcmp(chan->device->dev->driver->name, "imx-sdma") ||
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!strcmp(chan->device->dev->driver->name, "imx-dma");
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}
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#endif
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