Enabling multi-channel bit for SCO Tx is required to fix random 0s getting inserted. Set water mark level 1 for SCO Tx only. CRs-Fixed: 2094921 Change-Id: Ic26ef47478ed2ae8edb05aeaec182bb170c4f32d Signed-off-by: Satish Kodishala <skodisha@codeaurora.org>
176 lines
4.8 KiB
C
176 lines
4.8 KiB
C
/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/slimbus/slimbus.h>
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#include <btfm_slim.h>
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#include <btfm_slim_wcn3990.h>
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/* WCN3990 Port assignment */
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struct btfmslim_ch wcn3990_rxport[] = {
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{.id = BTFM_BT_SCO_A2DP_SLIM_RX, .name = "SCO_A2P_Rx",
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.port = CHRK_SB_PGD_PORT_RX_SCO},
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{.id = BTFM_BT_SPLIT_A2DP_SLIM_RX, .name = "A2P_Rx",
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.port = CHRK_SB_PGD_PORT_RX_A2P},
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{.id = BTFM_SLIM_NUM_CODEC_DAIS, .name = "",
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.port = BTFM_SLIM_PGD_PORT_LAST},
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};
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struct btfmslim_ch wcn3990_txport[] = {
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{.id = BTFM_FM_SLIM_TX, .name = "FM_Tx1",
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.port = CHRK_SB_PGD_PORT_TX1_FM},
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{.id = BTFM_FM_SLIM_TX, .name = "FM_Tx2",
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.port = CHRK_SB_PGD_PORT_TX2_FM},
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{.id = BTFM_BT_SCO_SLIM_TX, .name = "SCO_Tx",
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.port = CHRK_SB_PGD_PORT_TX_SCO},
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{.id = BTFM_SLIM_NUM_CODEC_DAIS, .name = "",
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.port = BTFM_SLIM_PGD_PORT_LAST},
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};
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/* Function description */
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int btfm_slim_chrk_hw_init(struct btfmslim *btfmslim)
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{
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int ret = 0;
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uint8_t reg_val;
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uint16_t reg;
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BTFMSLIM_DBG("");
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if (!btfmslim)
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return -EINVAL;
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/* Get SB_SLAVE_HW_REV_MSB value*/
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reg = CHRK_SB_SLAVE_HW_REV_MSB;
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ret = btfm_slim_read(btfmslim, reg, 1, ®_val, IFD);
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if (ret) {
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BTFMSLIM_ERR("failed to read (%d) reg 0x%x", ret, reg);
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goto error;
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}
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BTFMSLIM_DBG("Major Rev: 0x%x, Minor Rev: 0x%x",
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(reg_val & 0xF0) >> 4, (reg_val & 0x0F));
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/* Get SB_SLAVE_HW_REV_LSB value*/
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reg = CHRK_SB_SLAVE_HW_REV_LSB;
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ret = btfm_slim_read(btfmslim, reg, 1, ®_val, IFD);
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if (ret) {
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BTFMSLIM_ERR("failed to read (%d) reg 0x%x", ret, reg);
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goto error;
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}
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BTFMSLIM_DBG("Step Rev: 0x%x", reg_val);
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error:
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return ret;
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}
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static inline int is_fm_port(uint8_t port_num)
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{
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if (port_num == CHRK_SB_PGD_PORT_TX1_FM ||
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port_num == CHRK_SB_PGD_PORT_TX2_FM)
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return 1;
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else
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return 0;
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}
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int btfm_slim_chrk_enable_port(struct btfmslim *btfmslim, uint8_t port_num,
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uint8_t rxport, uint8_t enable)
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{
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int ret = 0;
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uint8_t reg_val = 0, en;
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uint8_t port_bit = 0;
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uint16_t reg;
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BTFMSLIM_DBG("port(%d) enable(%d)", port_num, enable);
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if (rxport) {
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if (enable) {
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/* For SCO Rx, A2DP Rx */
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reg_val = 0x1;
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port_bit = port_num - 0x10;
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reg = CHRK_SB_PGD_RX_PORTn_MULTI_CHNL_0(port_bit);
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BTFMSLIM_DBG("writing reg_val (%d) to reg(%x)",
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reg_val, reg);
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ret = btfm_slim_write(btfmslim, reg, 1, ®_val, IFD);
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if (ret) {
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BTFMSLIM_ERR("failed to write (%d) reg 0x%x",
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ret, reg);
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goto error;
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}
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}
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/* Port enable */
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reg = CHRK_SB_PGD_PORT_RX_CFGN(port_num - 0x10);
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goto enable_disable_rxport;
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}
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if (!enable)
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goto enable_disable_txport;
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/* txport */
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/* Multiple Channel Setting */
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if (is_fm_port(port_num)) {
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reg_val = (0x1 << CHRK_SB_PGD_PORT_TX1_FM) |
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(0x1 << CHRK_SB_PGD_PORT_TX2_FM);
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reg = CHRK_SB_PGD_TX_PORTn_MULTI_CHNL_0(port_num);
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ret = btfm_slim_write(btfmslim, reg, 1, ®_val, IFD);
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if (ret) {
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BTFMSLIM_ERR("failed to write (%d) reg 0x%x",
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ret, reg);
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goto error;
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}
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} else if (port_num == CHRK_SB_PGD_PORT_TX_SCO) {
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/* SCO Tx */
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reg_val = 0x1 << CHRK_SB_PGD_PORT_TX_SCO;
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reg = CHRK_SB_PGD_TX_PORTn_MULTI_CHNL_0(port_num);
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BTFMSLIM_DBG("writing reg_val (%d) to reg(%x)",
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reg_val, reg);
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ret = btfm_slim_write(btfmslim, reg, 1, ®_val, IFD);
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if (ret) {
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BTFMSLIM_ERR("failed to write (%d) reg 0x%x",
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ret, reg);
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goto error;
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}
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}
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/* Enable Tx port hw auto recovery for underrun or overrun error */
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reg_val = (CHRK_ENABLE_OVERRUN_AUTO_RECOVERY |
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CHRK_ENABLE_UNDERRUN_AUTO_RECOVERY);
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reg = CHRK_SB_PGD_PORT_TX_OR_UR_CFGN(port_num);
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ret = btfm_slim_write(btfmslim, reg, 1, ®_val, IFD);
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if (ret) {
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BTFMSLIM_ERR("failed to write (%d) reg 0x%x", ret, reg);
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goto error;
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}
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enable_disable_txport:
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/* Port enable */
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reg = CHRK_SB_PGD_PORT_TX_CFGN(port_num);
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enable_disable_rxport:
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if (enable)
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en = CHRK_SB_PGD_PORT_ENABLE;
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else
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en = CHRK_SB_PGD_PORT_DISABLE;
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if (is_fm_port(port_num))
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reg_val = en | CHRK_SB_PGD_PORT_WM_L8;
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else if (port_num == CHRK_SB_PGD_PORT_TX_SCO)
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reg_val = enable ? en | CHRK_SB_PGD_PORT_WM_L1 : en;
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else
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reg_val = enable ? en | CHRK_SB_PGD_PORT_WM_LB : en;
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if (enable && port_num == CHRK_SB_PGD_PORT_TX_SCO)
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BTFMSLIM_INFO("programming SCO Tx with reg_val %d to reg 0x%x",
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reg_val, reg);
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ret = btfm_slim_write(btfmslim, reg, 1, ®_val, IFD);
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if (ret)
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BTFMSLIM_ERR("failed to write (%d) reg 0x%x", ret, reg);
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error:
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return ret;
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}
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