The omapdrm driver implements a mechanism to apply new settings (due to plane update, plane disable, plane property set, CRTC mode set or CRTC DPMS) asynchronously. While this improves performance, it adds a level of complexity that makes transition to the atomic update API close to impossible. Furthermore the atomic update API requires part of the apply operations to be synchronous (such as pinning the framebuffers), so the current implementation needs to be changed. Simplify the CRTC and plane code by making updates synchronous to prepare for the switch to the atomic update API. Asynchronous update will be implemented in a second step. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
685 lines
18 KiB
C
685 lines
18 KiB
C
/*
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* drivers/gpu/drm/omapdrm/omap_crtc.c
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*
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* Copyright (C) 2011 Texas Instruments
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* Author: Rob Clark <rob@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/completion.h>
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#include "omap_drv.h"
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#include <drm/drm_mode.h>
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#include <drm/drm_plane_helper.h>
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#include "drm_crtc.h"
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#include "drm_crtc_helper.h"
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#define to_omap_crtc(x) container_of(x, struct omap_crtc, base)
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struct omap_crtc {
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struct drm_crtc base;
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const char *name;
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int pipe;
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enum omap_channel channel;
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struct omap_overlay_manager_info info;
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struct drm_encoder *current_encoder;
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/*
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* Temporary: eventually this will go away, but it is needed
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* for now to keep the output's happy. (They only need
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* mgr->id.) Eventually this will be replaced w/ something
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* more common-panel-framework-y
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*/
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struct omap_overlay_manager *mgr;
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struct omap_video_timings timings;
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bool enabled;
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struct omap_drm_irq vblank_irq;
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struct omap_drm_irq error_irq;
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/* list of framebuffers to unpin */
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struct list_head pending_unpins;
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/* if there is a pending flip, these will be non-null: */
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struct drm_pending_vblank_event *event;
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struct drm_framebuffer *old_fb;
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struct completion completion;
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/* for handling page flips without caring about what
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* the callback is called from. Possibly we should just
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* make omap_gem always call the cb from the worker so
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* we don't have to care about this..
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*/
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struct work_struct page_flip_work;
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bool ignore_digit_sync_lost;
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};
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struct omap_framebuffer_unpin {
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struct list_head list;
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struct drm_framebuffer *fb;
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};
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/* -----------------------------------------------------------------------------
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* Helper Functions
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*/
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uint32_t pipe2vbl(struct drm_crtc *crtc)
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{
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struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
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return dispc_mgr_get_vsync_irq(omap_crtc->channel);
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}
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const struct omap_video_timings *omap_crtc_timings(struct drm_crtc *crtc)
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{
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struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
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return &omap_crtc->timings;
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}
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enum omap_channel omap_crtc_channel(struct drm_crtc *crtc)
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{
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struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
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return omap_crtc->channel;
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}
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/* -----------------------------------------------------------------------------
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* DSS Manager Functions
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*/
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/*
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* Manager-ops, callbacks from output when they need to configure
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* the upstream part of the video pipe.
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*
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* Most of these we can ignore until we add support for command-mode
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* panels.. for video-mode the crtc-helpers already do an adequate
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* job of sequencing the setup of the video pipe in the proper order
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*/
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/* ovl-mgr-id -> crtc */
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static struct omap_crtc *omap_crtcs[8];
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/* we can probably ignore these until we support command-mode panels: */
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static int omap_crtc_connect(struct omap_overlay_manager *mgr,
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struct omap_dss_device *dst)
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{
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if (mgr->output)
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return -EINVAL;
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if ((mgr->supported_outputs & dst->id) == 0)
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return -EINVAL;
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dst->manager = mgr;
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mgr->output = dst;
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return 0;
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}
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static void omap_crtc_disconnect(struct omap_overlay_manager *mgr,
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struct omap_dss_device *dst)
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{
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mgr->output->manager = NULL;
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mgr->output = NULL;
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}
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static void omap_crtc_start_update(struct omap_overlay_manager *mgr)
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{
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}
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/* Called only from omap_crtc_setup and suspend/resume handlers. */
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static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable)
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{
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struct drm_device *dev = crtc->dev;
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struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
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enum omap_channel channel = omap_crtc->channel;
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struct omap_irq_wait *wait;
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u32 framedone_irq, vsync_irq;
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int ret;
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if (dispc_mgr_is_enabled(channel) == enable)
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return;
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if (omap_crtc->channel == OMAP_DSS_CHANNEL_DIGIT) {
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/*
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* Digit output produces some sync lost interrupts during the
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* first frame when enabling, so we need to ignore those.
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*/
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omap_crtc->ignore_digit_sync_lost = true;
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}
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framedone_irq = dispc_mgr_get_framedone_irq(channel);
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vsync_irq = dispc_mgr_get_vsync_irq(channel);
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if (enable) {
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wait = omap_irq_wait_init(dev, vsync_irq, 1);
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} else {
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/*
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* When we disable the digit output, we need to wait for
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* FRAMEDONE to know that DISPC has finished with the output.
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*
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* OMAP2/3 does not have FRAMEDONE irq for digit output, and in
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* that case we need to use vsync interrupt, and wait for both
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* even and odd frames.
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*/
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if (framedone_irq)
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wait = omap_irq_wait_init(dev, framedone_irq, 1);
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else
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wait = omap_irq_wait_init(dev, vsync_irq, 2);
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}
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dispc_mgr_enable(channel, enable);
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ret = omap_irq_wait(dev, wait, msecs_to_jiffies(100));
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if (ret) {
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dev_err(dev->dev, "%s: timeout waiting for %s\n",
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omap_crtc->name, enable ? "enable" : "disable");
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}
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if (omap_crtc->channel == OMAP_DSS_CHANNEL_DIGIT) {
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omap_crtc->ignore_digit_sync_lost = false;
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/* make sure the irq handler sees the value above */
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mb();
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}
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}
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static int omap_crtc_enable(struct omap_overlay_manager *mgr)
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{
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struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
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dispc_mgr_setup(omap_crtc->channel, &omap_crtc->info);
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dispc_mgr_set_timings(omap_crtc->channel,
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&omap_crtc->timings);
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omap_crtc_set_enabled(&omap_crtc->base, true);
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return 0;
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}
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static void omap_crtc_disable(struct omap_overlay_manager *mgr)
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{
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struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
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omap_crtc_set_enabled(&omap_crtc->base, false);
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}
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static void omap_crtc_set_timings(struct omap_overlay_manager *mgr,
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const struct omap_video_timings *timings)
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{
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struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
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DBG("%s", omap_crtc->name);
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omap_crtc->timings = *timings;
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}
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static void omap_crtc_set_lcd_config(struct omap_overlay_manager *mgr,
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const struct dss_lcd_mgr_config *config)
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{
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struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
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DBG("%s", omap_crtc->name);
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dispc_mgr_set_lcd_config(omap_crtc->channel, config);
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}
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static int omap_crtc_register_framedone_handler(
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struct omap_overlay_manager *mgr,
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void (*handler)(void *), void *data)
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{
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return 0;
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}
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static void omap_crtc_unregister_framedone_handler(
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struct omap_overlay_manager *mgr,
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void (*handler)(void *), void *data)
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{
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}
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static const struct dss_mgr_ops mgr_ops = {
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.connect = omap_crtc_connect,
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.disconnect = omap_crtc_disconnect,
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.start_update = omap_crtc_start_update,
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.enable = omap_crtc_enable,
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.disable = omap_crtc_disable,
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.set_timings = omap_crtc_set_timings,
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.set_lcd_config = omap_crtc_set_lcd_config,
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.register_framedone_handler = omap_crtc_register_framedone_handler,
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.unregister_framedone_handler = omap_crtc_unregister_framedone_handler,
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};
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/* -----------------------------------------------------------------------------
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* Setup and Flush
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*/
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static void omap_crtc_error_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
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{
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struct omap_crtc *omap_crtc =
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container_of(irq, struct omap_crtc, error_irq);
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if (omap_crtc->ignore_digit_sync_lost) {
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irqstatus &= ~DISPC_IRQ_SYNC_LOST_DIGIT;
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if (!irqstatus)
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return;
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}
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DRM_ERROR_RATELIMITED("%s: errors: %08x\n", omap_crtc->name, irqstatus);
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}
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static void omap_crtc_vblank_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
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{
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struct omap_crtc *omap_crtc =
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container_of(irq, struct omap_crtc, vblank_irq);
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struct drm_device *dev = omap_crtc->base.dev;
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unsigned long flags;
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if (dispc_mgr_go_busy(omap_crtc->channel))
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return;
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DBG("%s: apply done", omap_crtc->name);
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__omap_irq_unregister(dev, &omap_crtc->vblank_irq);
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spin_lock_irqsave(&dev->event_lock, flags);
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/* wakeup userspace */
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if (omap_crtc->event)
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drm_send_vblank_event(dev, omap_crtc->pipe, omap_crtc->event);
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omap_crtc->event = NULL;
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omap_crtc->old_fb = NULL;
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spin_unlock_irqrestore(&dev->event_lock, flags);
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complete(&omap_crtc->completion);
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}
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int omap_crtc_flush(struct drm_crtc *crtc)
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{
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struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
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struct omap_framebuffer_unpin *fb, *next;
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DBG("%s: GO", omap_crtc->name);
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WARN_ON(!drm_modeset_is_locked(&crtc->mutex));
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WARN_ON(omap_crtc->vblank_irq.registered);
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dispc_runtime_get();
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if (dispc_mgr_is_enabled(omap_crtc->channel)) {
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dispc_mgr_go(omap_crtc->channel);
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omap_irq_register(crtc->dev, &omap_crtc->vblank_irq);
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WARN_ON(!wait_for_completion_timeout(&omap_crtc->completion,
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msecs_to_jiffies(100)));
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reinit_completion(&omap_crtc->completion);
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}
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dispc_runtime_put();
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/* Unpin and unreference pending framebuffers. */
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list_for_each_entry_safe(fb, next, &omap_crtc->pending_unpins, list) {
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omap_framebuffer_unpin(fb->fb);
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drm_framebuffer_unreference(fb->fb);
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list_del(&fb->list);
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kfree(fb);
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}
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return 0;
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}
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int omap_crtc_queue_unpin(struct drm_crtc *crtc, struct drm_framebuffer *fb)
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{
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struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
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struct omap_framebuffer_unpin *unpin;
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unpin = kzalloc(sizeof(*unpin), GFP_KERNEL);
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if (!unpin)
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return -ENOMEM;
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unpin->fb = fb;
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list_add_tail(&unpin->list, &omap_crtc->pending_unpins);
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return 0;
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}
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static void omap_crtc_setup(struct drm_crtc *crtc)
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{
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struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
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struct omap_drm_private *priv = crtc->dev->dev_private;
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struct drm_encoder *encoder = NULL;
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unsigned int i;
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DBG("%s: enabled=%d", omap_crtc->name, omap_crtc->enabled);
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dispc_runtime_get();
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for (i = 0; i < priv->num_encoders; i++) {
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if (priv->encoders[i]->crtc == crtc) {
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encoder = priv->encoders[i];
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break;
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}
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}
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if (omap_crtc->current_encoder && encoder != omap_crtc->current_encoder)
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omap_encoder_set_enabled(omap_crtc->current_encoder, false);
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omap_crtc->current_encoder = encoder;
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if (!omap_crtc->enabled) {
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if (encoder)
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omap_encoder_set_enabled(encoder, false);
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} else {
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if (encoder) {
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omap_encoder_set_enabled(encoder, false);
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omap_encoder_update(encoder, omap_crtc->mgr,
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&omap_crtc->timings);
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omap_encoder_set_enabled(encoder, true);
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}
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}
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dispc_runtime_put();
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}
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/* -----------------------------------------------------------------------------
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* CRTC Functions
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*/
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static void omap_crtc_destroy(struct drm_crtc *crtc)
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{
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struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
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DBG("%s", omap_crtc->name);
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WARN_ON(omap_crtc->vblank_irq.registered);
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omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
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drm_crtc_cleanup(crtc);
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kfree(omap_crtc);
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}
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static void omap_crtc_dpms(struct drm_crtc *crtc, int mode)
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{
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struct omap_drm_private *priv = crtc->dev->dev_private;
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struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
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bool enabled = (mode == DRM_MODE_DPMS_ON);
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int i;
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DBG("%s: %d", omap_crtc->name, mode);
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if (enabled == omap_crtc->enabled)
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return;
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/* Enable/disable all planes associated with the CRTC. */
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for (i = 0; i < priv->num_planes; i++) {
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struct drm_plane *plane = priv->planes[i];
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if (plane->crtc == crtc)
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WARN_ON(omap_plane_set_enable(plane, enabled));
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}
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omap_crtc->enabled = enabled;
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omap_crtc_setup(crtc);
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omap_crtc_flush(crtc);
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}
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static bool omap_crtc_mode_fixup(struct drm_crtc *crtc,
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const struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode)
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{
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return true;
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}
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static int omap_crtc_mode_set(struct drm_crtc *crtc,
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struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode,
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int x, int y,
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struct drm_framebuffer *old_fb)
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{
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struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
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mode = adjusted_mode;
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DBG("%s: set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
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omap_crtc->name, mode->base.id, mode->name,
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mode->vrefresh, mode->clock,
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mode->hdisplay, mode->hsync_start,
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mode->hsync_end, mode->htotal,
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mode->vdisplay, mode->vsync_start,
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mode->vsync_end, mode->vtotal,
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mode->type, mode->flags);
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copy_timings_drm_to_omap(&omap_crtc->timings, mode);
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/*
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* The primary plane CRTC can be reset if the plane is disabled directly
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* through the universal plane API. Set it again here.
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*/
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crtc->primary->crtc = crtc;
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return omap_plane_mode_set(crtc->primary, crtc, crtc->primary->fb,
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0, 0, mode->hdisplay, mode->vdisplay,
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x, y, mode->hdisplay, mode->vdisplay);
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}
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static void omap_crtc_prepare(struct drm_crtc *crtc)
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{
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struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
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DBG("%s", omap_crtc->name);
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omap_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
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}
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static void omap_crtc_commit(struct drm_crtc *crtc)
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{
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struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
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DBG("%s", omap_crtc->name);
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omap_crtc_dpms(crtc, DRM_MODE_DPMS_ON);
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}
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static int omap_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
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struct drm_framebuffer *old_fb)
|
|
{
|
|
struct drm_plane *plane = crtc->primary;
|
|
struct drm_display_mode *mode = &crtc->mode;
|
|
int ret;
|
|
|
|
ret = omap_plane_mode_set(plane, crtc, crtc->primary->fb,
|
|
0, 0, mode->hdisplay, mode->vdisplay,
|
|
x, y, mode->hdisplay, mode->vdisplay);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
return omap_crtc_flush(crtc);
|
|
}
|
|
|
|
static void page_flip_worker(struct work_struct *work)
|
|
{
|
|
struct omap_crtc *omap_crtc =
|
|
container_of(work, struct omap_crtc, page_flip_work);
|
|
struct drm_crtc *crtc = &omap_crtc->base;
|
|
struct drm_display_mode *mode = &crtc->mode;
|
|
struct drm_gem_object *bo;
|
|
|
|
drm_modeset_lock(&crtc->mutex, NULL);
|
|
omap_plane_mode_set(crtc->primary, crtc, crtc->primary->fb,
|
|
0, 0, mode->hdisplay, mode->vdisplay,
|
|
crtc->x, crtc->y, mode->hdisplay, mode->vdisplay);
|
|
omap_crtc_flush(crtc);
|
|
drm_modeset_unlock(&crtc->mutex);
|
|
|
|
bo = omap_framebuffer_bo(crtc->primary->fb, 0);
|
|
drm_gem_object_unreference_unlocked(bo);
|
|
drm_framebuffer_unreference(crtc->primary->fb);
|
|
}
|
|
|
|
static void page_flip_cb(void *arg)
|
|
{
|
|
struct drm_crtc *crtc = arg;
|
|
struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
|
|
struct omap_drm_private *priv = crtc->dev->dev_private;
|
|
|
|
/* avoid assumptions about what ctxt we are called from: */
|
|
queue_work(priv->wq, &omap_crtc->page_flip_work);
|
|
}
|
|
|
|
static int omap_crtc_page_flip_locked(struct drm_crtc *crtc,
|
|
struct drm_framebuffer *fb,
|
|
struct drm_pending_vblank_event *event,
|
|
uint32_t page_flip_flags)
|
|
{
|
|
struct drm_device *dev = crtc->dev;
|
|
struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
|
|
struct drm_plane *primary = crtc->primary;
|
|
struct drm_gem_object *bo;
|
|
unsigned long flags;
|
|
|
|
DBG("%d -> %d (event=%p)", primary->fb ? primary->fb->base.id : -1,
|
|
fb->base.id, event);
|
|
|
|
spin_lock_irqsave(&dev->event_lock, flags);
|
|
|
|
if (omap_crtc->old_fb) {
|
|
spin_unlock_irqrestore(&dev->event_lock, flags);
|
|
dev_err(dev->dev, "already a pending flip\n");
|
|
return -EBUSY;
|
|
}
|
|
|
|
omap_crtc->event = event;
|
|
omap_crtc->old_fb = primary->fb = fb;
|
|
drm_framebuffer_reference(omap_crtc->old_fb);
|
|
|
|
spin_unlock_irqrestore(&dev->event_lock, flags);
|
|
|
|
/*
|
|
* Hold a reference temporarily until the crtc is updated
|
|
* and takes the reference to the bo. This avoids it
|
|
* getting freed from under us:
|
|
*/
|
|
bo = omap_framebuffer_bo(fb, 0);
|
|
drm_gem_object_reference(bo);
|
|
|
|
omap_gem_op_async(bo, OMAP_GEM_READ, page_flip_cb, crtc);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int omap_crtc_set_property(struct drm_crtc *crtc,
|
|
struct drm_property *property, uint64_t val)
|
|
{
|
|
if (property == crtc->dev->mode_config.rotation_property) {
|
|
crtc->invert_dimensions =
|
|
!!(val & ((1LL << DRM_ROTATE_90) | (1LL << DRM_ROTATE_270)));
|
|
}
|
|
|
|
return omap_plane_set_property(crtc->primary, property, val);
|
|
}
|
|
|
|
static const struct drm_crtc_funcs omap_crtc_funcs = {
|
|
.set_config = drm_crtc_helper_set_config,
|
|
.destroy = omap_crtc_destroy,
|
|
.page_flip = omap_crtc_page_flip_locked,
|
|
.set_property = omap_crtc_set_property,
|
|
};
|
|
|
|
static const struct drm_crtc_helper_funcs omap_crtc_helper_funcs = {
|
|
.dpms = omap_crtc_dpms,
|
|
.mode_fixup = omap_crtc_mode_fixup,
|
|
.mode_set = omap_crtc_mode_set,
|
|
.prepare = omap_crtc_prepare,
|
|
.commit = omap_crtc_commit,
|
|
.mode_set_base = omap_crtc_mode_set_base,
|
|
};
|
|
|
|
/* -----------------------------------------------------------------------------
|
|
* Init and Cleanup
|
|
*/
|
|
|
|
static const char *channel_names[] = {
|
|
[OMAP_DSS_CHANNEL_LCD] = "lcd",
|
|
[OMAP_DSS_CHANNEL_DIGIT] = "tv",
|
|
[OMAP_DSS_CHANNEL_LCD2] = "lcd2",
|
|
[OMAP_DSS_CHANNEL_LCD3] = "lcd3",
|
|
};
|
|
|
|
void omap_crtc_pre_init(void)
|
|
{
|
|
dss_install_mgr_ops(&mgr_ops);
|
|
}
|
|
|
|
void omap_crtc_pre_uninit(void)
|
|
{
|
|
dss_uninstall_mgr_ops();
|
|
}
|
|
|
|
/* initialize crtc */
|
|
struct drm_crtc *omap_crtc_init(struct drm_device *dev,
|
|
struct drm_plane *plane, enum omap_channel channel, int id)
|
|
{
|
|
struct drm_crtc *crtc = NULL;
|
|
struct omap_crtc *omap_crtc;
|
|
struct omap_overlay_manager_info *info;
|
|
int ret;
|
|
|
|
DBG("%s", channel_names[channel]);
|
|
|
|
omap_crtc = kzalloc(sizeof(*omap_crtc), GFP_KERNEL);
|
|
if (!omap_crtc)
|
|
return NULL;
|
|
|
|
crtc = &omap_crtc->base;
|
|
|
|
INIT_WORK(&omap_crtc->page_flip_work, page_flip_worker);
|
|
|
|
INIT_LIST_HEAD(&omap_crtc->pending_unpins);
|
|
|
|
init_completion(&omap_crtc->completion);
|
|
|
|
omap_crtc->channel = channel;
|
|
omap_crtc->name = channel_names[channel];
|
|
omap_crtc->pipe = id;
|
|
|
|
omap_crtc->vblank_irq.irqmask = pipe2vbl(crtc);
|
|
omap_crtc->vblank_irq.irq = omap_crtc_vblank_irq;
|
|
|
|
omap_crtc->error_irq.irqmask =
|
|
dispc_mgr_get_sync_lost_irq(channel);
|
|
omap_crtc->error_irq.irq = omap_crtc_error_irq;
|
|
omap_irq_register(dev, &omap_crtc->error_irq);
|
|
|
|
/* temporary: */
|
|
omap_crtc->mgr = omap_dss_get_overlay_manager(channel);
|
|
|
|
/* TODO: fix hard-coded setup.. add properties! */
|
|
info = &omap_crtc->info;
|
|
info->default_color = 0x00000000;
|
|
info->trans_key = 0x00000000;
|
|
info->trans_key_type = OMAP_DSS_COLOR_KEY_GFX_DST;
|
|
info->trans_enabled = false;
|
|
|
|
ret = drm_crtc_init_with_planes(dev, crtc, plane, NULL,
|
|
&omap_crtc_funcs);
|
|
if (ret < 0) {
|
|
kfree(omap_crtc);
|
|
return NULL;
|
|
}
|
|
|
|
drm_crtc_helper_add(crtc, &omap_crtc_helper_funcs);
|
|
|
|
omap_plane_install_properties(crtc->primary, &crtc->base);
|
|
|
|
omap_crtcs[channel] = omap_crtc;
|
|
|
|
return crtc;
|
|
}
|