Coherent devices can make use of the CPU cache, so they should get coherent IOMMU mappings and should have their cache maintenance operations skipped. Implement this for the vanilla arm64 IOMMU mapper. Change-Id: Iab6715a071a5fa5556934d7771a6d07d678e9703 Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org> |
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alpha | ||
arc | ||
arm | ||
arm64 | ||
avr32 | ||
blackfin | ||
c6x | ||
cris | ||
frv | ||
h8300 | ||
hexagon | ||
ia64 | ||
m32r | ||
m68k | ||
metag | ||
microblaze | ||
mips | ||
mn10300 | ||
nios2 | ||
openrisc | ||
parisc | ||
powerpc | ||
s390 | ||
score | ||
sh | ||
sparc | ||
tile | ||
um | ||
unicore32 | ||
x86 | ||
xtensa | ||
.gitignore | ||
Kconfig |