Add dwc3-msm.c and associated driver files. Note these are based on the downstream implementation and will coexist (for the time being) with dwc3-qcom glue driver until they can eventually be merged. This snapshot is taken as of msm-3.18 commit a3883c356869 (Merge "input: touchscreen: correct condition checks in ITE tech touch driver") Signed-off-by: Jack Pham <jackp@codeaurora.org>
312 lines
8.9 KiB
C
312 lines
8.9 KiB
C
/* include/linux/usb/msm_hsusb.h
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*
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* Copyright (C) 2008 Google, Inc.
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* Author: Brian Swetland <swetland@google.com>
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* Copyright (c) 2009-2016, The Linux Foundation. All rights reserved.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef __ASM_ARCH_MSM_HSUSB_H
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#define __ASM_ARCH_MSM_HSUSB_H
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#include <linux/extcon.h>
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#include <linux/types.h>
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#include <linux/usb/ch9.h>
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#include <linux/usb/gadget.h>
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#include <linux/usb/otg.h>
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/*
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* The following are bit fields describing the usb_request.udc_priv word.
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* These bit fields are set by function drivers that wish to queue
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* usb_requests with sps/bam parameters.
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*/
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#define MSM_PIPE_ID_MASK (0x1F)
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#define MSM_TX_PIPE_ID_OFS (16)
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#define MSM_SPS_MODE BIT(5)
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#define MSM_IS_FINITE_TRANSFER BIT(6)
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#define MSM_PRODUCER BIT(7)
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#define MSM_DISABLE_WB BIT(8)
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#define MSM_ETD_IOC BIT(9)
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#define MSM_INTERNAL_MEM BIT(10)
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#define MSM_VENDOR_ID BIT(16)
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/**
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* OTG control
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*
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* OTG_NO_CONTROL Id/VBUS notifications not required. Useful in host
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* only configuration.
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* OTG_PHY_CONTROL Id/VBUS notifications comes form USB PHY.
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* OTG_PMIC_CONTROL Id/VBUS notifications comes from PMIC hardware.
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* OTG_USER_CONTROL Id/VBUS notifcations comes from User via sysfs.
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*
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*/
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enum otg_control_type {
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OTG_NO_CONTROL = 0,
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OTG_PHY_CONTROL,
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OTG_PMIC_CONTROL,
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OTG_USER_CONTROL,
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};
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/**
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* PHY used in
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*
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* INVALID_PHY Unsupported PHY
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* CI_45NM_INTEGRATED_PHY Chipidea 45nm integrated PHY
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* SNPS_28NM_INTEGRATED_PHY Synopsis 28nm integrated PHY
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*
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*/
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enum msm_usb_phy_type {
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INVALID_PHY = 0,
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CI_45NM_INTEGRATED_PHY,
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SNPS_28NM_INTEGRATED_PHY,
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};
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#define IDEV_CHG_MAX 1500
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#define IUNIT 100
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/**
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* Different states involved in USB charger detection.
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*
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* USB_CHG_STATE_UNDEFINED USB charger is not connected or detection
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* process is not yet started.
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* USB_CHG_STATE_WAIT_FOR_DCD Waiting for Data pins contact.
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* USB_CHG_STATE_DCD_DONE Data pin contact is detected.
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* USB_CHG_STATE_PRIMARY_DONE Primary detection is completed (Detects
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* between SDP and DCP/CDP).
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* USB_CHG_STATE_SECONDARY_DONE Secondary detection is completed (Detects
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* between DCP and CDP).
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* USB_CHG_STATE_DETECTED USB charger type is determined.
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*
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*/
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enum usb_chg_state {
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USB_CHG_STATE_UNDEFINED = 0,
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USB_CHG_STATE_WAIT_FOR_DCD,
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USB_CHG_STATE_DCD_DONE,
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USB_CHG_STATE_PRIMARY_DONE,
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USB_CHG_STATE_SECONDARY_DONE,
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USB_CHG_STATE_DETECTED,
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};
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/**
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* USB charger types
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*
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* USB_INVALID_CHARGER Invalid USB charger.
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* USB_SDP_CHARGER Standard downstream port. Refers to a downstream port
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* on USB2.0 compliant host/hub.
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* USB_DCP_CHARGER Dedicated charger port (AC charger/ Wall charger).
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* USB_CDP_CHARGER Charging downstream port. Enumeration can happen and
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* IDEV_CHG_MAX can be drawn irrespective of USB state.
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*
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*/
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enum usb_chg_type {
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USB_INVALID_CHARGER = 0,
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USB_SDP_CHARGER,
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USB_DCP_CHARGER,
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USB_CDP_CHARGER,
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};
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/**
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* Supported USB controllers
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*/
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enum usb_ctrl {
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DWC3_CTRL = 0, /* DWC3 controller */
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CI_CTRL, /* ChipIdea controller */
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HSIC_CTRL, /* HSIC controller */
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NUM_CTRL,
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};
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/**
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* USB ID state
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*/
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enum usb_id_state {
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USB_ID_GROUND = 0,
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USB_ID_FLOAT,
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};
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/**
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* struct msm_otg_platform_data - platform device data
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* for msm_otg driver.
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* @phy_init_seq: PHY configuration sequence values. Value of -1 is reserved as
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* "do not overwrite default vaule at this address".
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* @phy_init_sz: PHY configuration sequence size.
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* @vbus_power: VBUS power on/off routine.
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* @power_budget: VBUS power budget in mA (0 will be treated as 500mA).
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* @mode: Supported mode (OTG/peripheral/host).
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* @otg_control: OTG switch controlled by user/Id pin
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*/
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struct msm_otg_platform_data {
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int *phy_init_seq;
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int phy_init_sz;
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void (*vbus_power)(bool on);
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unsigned power_budget;
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enum usb_dr_mode mode;
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enum otg_control_type otg_control;
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enum msm_usb_phy_type phy_type;
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void (*setup_gpio)(enum usb_otg_state state);
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};
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/**
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* struct msm_usb_cable - structure for exteternal connector cable
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* state tracking
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* @nb: hold event notification callback
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* @conn: used for notification registration
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*/
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struct msm_usb_cable {
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struct notifier_block nb;
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struct extcon_dev *extcon;
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};
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/* phy related flags */
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#define ENABLE_DP_MANUAL_PULLUP BIT(0)
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#define ENABLE_SECONDARY_PHY BIT(1)
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#define PHY_HOST_MODE BIT(2)
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#define PHY_CHARGER_CONNECTED BIT(3)
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#define PHY_VBUS_VALID_OVERRIDE BIT(4)
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#define DEVICE_IN_SS_MODE BIT(5)
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#define USB_NUM_BUS_CLOCKS 3
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/**
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* struct msm_otg: OTG driver data. Shared by HCD and DCD.
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* @otg: USB OTG Transceiver structure.
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* @pdata: otg device platform data.
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* @irq: IRQ number assigned for HSUSB controller.
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* @clk: clock struct of usb_hs_clk.
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* @pclk: clock struct of usb_hs_pclk.
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* @core_clk: clock struct of usb_hs_core_clk.
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* @regs: ioremapped register base address.
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* @inputs: OTG state machine inputs(Id, SessValid etc).
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* @sm_work: OTG state machine work.
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* @in_lpm: indicates low power mode (LPM) state.
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* @async_int: Async interrupt arrived.
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* @cur_power: The amount of mA available from downstream port.
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* @chg_work: Charger detection work.
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* @chg_state: The state of charger detection process.
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* @chg_type: The type of charger attached.
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* @dcd_retires: The retry count used to track Data contact
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* detection process.
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* @manual_pullup: true if VBUS is not routed to USB controller/phy
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* and controller driver therefore enables pull-up explicitly before
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* starting controller using usbcmd run/stop bit.
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* @vbus: VBUS signal state trakining, using extcon framework
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* @id: ID signal state trakining, using extcon framework
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* @switch_gpio: Descriptor for GPIO used to control external Dual
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* SPDT USB Switch.
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* @reboot: Used to inform the driver to route USB D+/D- line to Device
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* connector
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*/
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struct msm_otg {
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struct usb_phy phy;
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struct msm_otg_platform_data *pdata;
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int irq;
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struct clk *clk;
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struct clk *pclk;
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struct clk *core_clk;
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void __iomem *regs;
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#define ID 0
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#define B_SESS_VLD 1
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unsigned long inputs;
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struct work_struct sm_work;
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atomic_t in_lpm;
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int async_int;
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unsigned cur_power;
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int phy_number;
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struct delayed_work chg_work;
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enum usb_chg_state chg_state;
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enum usb_chg_type chg_type;
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u8 dcd_retries;
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struct regulator *v3p3;
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struct regulator *v1p8;
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struct regulator *vddcx;
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struct reset_control *phy_rst;
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struct reset_control *link_rst;
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int vdd_levels[3];
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bool manual_pullup;
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struct msm_usb_cable vbus;
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struct msm_usb_cable id;
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struct gpio_desc *switch_gpio;
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struct notifier_block reboot;
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};
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#ifdef CONFIG_USB_BAM
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void msm_bam_set_usb_host_dev(struct device *dev);
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void msm_bam_set_hsic_host_dev(struct device *dev);
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void msm_bam_wait_for_usb_host_prod_granted(void);
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void msm_bam_wait_for_hsic_host_prod_granted(void);
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bool msm_bam_hsic_lpm_ok(void);
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void msm_bam_usb_host_notify_on_resume(void);
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void msm_bam_hsic_host_notify_on_resume(void);
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bool msm_bam_hsic_host_pipe_empty(void);
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bool msm_usb_bam_enable(enum usb_ctrl ctrl, bool bam_enable);
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#else
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static inline void msm_bam_set_usb_host_dev(struct device *dev) {}
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static inline void msm_bam_set_hsic_host_dev(struct device *dev) {}
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static inline void msm_bam_wait_for_usb_host_prod_granted(void) {}
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static inline void msm_bam_wait_for_hsic_host_prod_granted(void) {}
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static inline bool msm_bam_hsic_lpm_ok(void) { return true; }
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static inline void msm_bam_hsic_host_notify_on_resume(void) {}
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static inline void msm_bam_usb_host_notify_on_resume(void) {}
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static inline bool msm_bam_hsic_host_pipe_empty(void) { return true; }
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static inline bool msm_usb_bam_enable(enum usb_ctrl ctrl, bool bam_enable)
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{
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return true;
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}
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#endif
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#ifdef CONFIG_USB_DWC3_QCOM
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int msm_ep_config(struct usb_ep *ep);
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int msm_ep_unconfig(struct usb_ep *ep);
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void dwc3_tx_fifo_resize_request(struct usb_ep *ep, bool qdss_enable);
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int msm_data_fifo_config(struct usb_ep *ep, phys_addr_t addr, u32 size,
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u8 dst_pipe_idx);
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bool msm_dwc3_reset_ep_after_lpm(struct usb_gadget *gadget);
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int msm_dwc3_reset_dbm_ep(struct usb_ep *ep);
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#else
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static inline int msm_data_fifo_config(struct usb_ep *ep, phys_addr_t addr,
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u32 size, u8 dst_pipe_idx)
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{
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return -ENODEV;
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}
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static inline int msm_ep_config(struct usb_ep *ep)
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{
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return -ENODEV;
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}
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static inline int msm_ep_unconfig(struct usb_ep *ep)
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{
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return -ENODEV;
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}
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static inline void dwc3_tx_fifo_resize_request(
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struct usb_ep *ep, bool qdss_enable)
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{
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}
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static inline bool msm_dwc3_reset_ep_after_lpm(struct usb_gadget *gadget)
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{
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return false;
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}
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static inline int msm_dwc3_reset_dbm_ep(struct usb_ep *ep)
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{
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return -ENODEV;
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}
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#endif
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#endif
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