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android_kernel_oneplus_msm8998/arch/arm/boot/dts/qcom/dsi-panel-nt35597-truly-dsc-wqxga-video.dtsi
Ashish Garg d433ca6670 ARM: dts: msm: update the panel escape clock for truly panel 
For some panels, escape clock needs to be updated for checking
the panel status periodically. Update the panel init sequence
to increase the escape clock.

Change-Id: I4a154d30e829c80587b3207ddc754aace927ab1c
Signed-off-by: Ashish Garg <ashigarg@codeaurora.org>
2017-03-16 12:47:11 +05:30

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/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&mdss_mdp {
dsi_nt35597_truly_dsc_video: qcom,mdss_dsi_nt35597_dsc_video_truly {
qcom,mdss-dsi-panel-name =
"nt35597 video mode dsi truly panel with DSC";
qcom,mdss-dsi-panel-type = "dsi_video_mode";
qcom,mdss-dsi-panel-framerate = <60>;
qcom,mdss-dsi-virtual-channel-id = <0>;
qcom,mdss-dsi-stream = <0>;
qcom,mdss-dsi-panel-width = <1440>;
qcom,mdss-dsi-panel-height = <2560>;
qcom,mdss-dsi-h-front-porch = <100>;
qcom,mdss-dsi-h-back-porch = <32>;
qcom,mdss-dsi-h-pulse-width = <16>;
qcom,mdss-dsi-h-sync-skew = <0>;
qcom,mdss-dsi-v-back-porch = <8>;
qcom,mdss-dsi-v-front-porch = <10>;
qcom,mdss-dsi-v-pulse-width = <2>;
qcom,mdss-dsi-bpp = <24>;
qcom,mdss-dsi-underflow-color = <0xff>;
qcom,mdss-dsi-border-color = <0>;
qcom,mdss-dsi-on-command = [
/* CMD2_P0 */
15 01 00 00 00 00 02 ff 20
15 01 00 00 00 00 02 fb 01
15 01 00 00 00 00 02 00 01
15 01 00 00 00 00 02 01 55
15 01 00 00 00 00 02 02 45
15 01 00 00 00 00 02 05 40
15 01 00 00 00 00 02 06 19
15 01 00 00 00 00 02 07 1e
15 01 00 00 00 00 02 0b 73
15 01 00 00 00 00 02 0c 73
15 01 00 00 00 00 02 0e b0
15 01 00 00 00 00 02 0f aE
15 01 00 00 00 00 02 11 b8
15 01 00 00 00 00 02 13 00
15 01 00 00 00 00 02 58 80
15 01 00 00 00 00 02 59 01
15 01 00 00 00 00 02 5a 00
15 01 00 00 00 00 02 5b 01
15 01 00 00 00 00 02 5c 80
15 01 00 00 00 00 02 5d 81
15 01 00 00 00 00 02 5e 00
15 01 00 00 00 00 02 5f 01
15 01 00 00 00 00 02 72 11
15 01 00 00 00 00 02 68 03
/* CMD2_P4 */
15 01 00 00 00 00 02 ff 24
15 01 00 00 00 00 02 fb 01
15 01 00 00 00 00 02 00 1c
15 01 00 00 00 00 02 01 0b
15 01 00 00 00 00 02 02 0c
15 01 00 00 00 00 02 03 01
15 01 00 00 00 00 02 04 0f
15 01 00 00 00 00 02 05 10
15 01 00 00 00 00 02 06 10
15 01 00 00 00 00 02 07 10
15 01 00 00 00 00 02 08 89
15 01 00 00 00 00 02 09 8a
15 01 00 00 00 00 02 0a 13
15 01 00 00 00 00 02 0b 13
15 01 00 00 00 00 02 0c 15
15 01 00 00 00 00 02 0d 15
15 01 00 00 00 00 02 0e 17
15 01 00 00 00 00 02 0f 17
15 01 00 00 00 00 02 10 1c
15 01 00 00 00 00 02 11 0b
15 01 00 00 00 00 02 12 0c
15 01 00 00 00 00 02 13 01
15 01 00 00 00 00 02 14 0f
15 01 00 00 00 00 02 15 10
15 01 00 00 00 00 02 16 10
15 01 00 00 00 00 02 17 10
15 01 00 00 00 00 02 18 89
15 01 00 00 00 00 02 19 8a
15 01 00 00 00 00 02 1a 13
15 01 00 00 00 00 02 1b 13
15 01 00 00 00 00 02 1c 15
15 01 00 00 00 00 02 1d 15
15 01 00 00 00 00 02 1e 17
15 01 00 00 00 00 02 1f 17
/* STV */
15 01 00 00 00 00 02 20 40
15 01 00 00 00 00 02 21 01
15 01 00 00 00 00 02 22 00
15 01 00 00 00 00 02 23 40
15 01 00 00 00 00 02 24 40
15 01 00 00 00 00 02 25 6d
15 01 00 00 00 00 02 26 40
15 01 00 00 00 00 02 27 40
/* Vend */
15 01 00 00 00 00 02 e0 00
15 01 00 00 00 00 02 dc 21
15 01 00 00 00 00 02 dd 22
15 01 00 00 00 00 02 de 07
15 01 00 00 00 00 02 df 07
15 01 00 00 00 00 02 e3 6d
15 01 00 00 00 00 02 e1 07
15 01 00 00 00 00 02 e2 07
/* UD */
15 01 00 00 00 00 02 29 d8
15 01 00 00 00 00 02 2a 2a
/* CLK */
15 01 00 00 00 00 02 4b 03
15 01 00 00 00 00 02 4c 11
15 01 00 00 00 00 02 4d 10
15 01 00 00 00 00 02 4e 01
15 01 00 00 00 00 02 4f 01
15 01 00 00 00 00 02 50 10
15 01 00 00 00 00 02 51 00
15 01 00 00 00 00 02 52 80
15 01 00 00 00 00 02 53 00
15 01 00 00 00 00 02 56 00
15 01 00 00 00 00 02 54 07
15 01 00 00 00 00 02 58 07
15 01 00 00 00 00 02 55 25
/* Reset XDONB */
15 01 00 00 00 00 02 5b 43
15 01 00 00 00 00 02 5c 00
15 01 00 00 00 00 02 5f 73
15 01 00 00 00 00 02 60 73
15 01 00 00 00 00 02 63 22
15 01 00 00 00 00 02 64 00
15 01 00 00 00 00 02 67 08
15 01 00 00 00 00 02 68 04
/* Resolution:1440x2560*/
15 01 00 00 00 00 02 72 02
/* mux */
15 01 00 00 00 00 02 7a 80
15 01 00 00 00 00 02 7b 91
15 01 00 00 00 00 02 7c d8
15 01 00 00 00 00 02 7d 60
15 01 00 00 00 00 02 7f 15
15 01 00 00 00 00 02 75 15
/* ABOFF */
15 01 00 00 00 00 02 b3 c0
15 01 00 00 00 00 02 b4 00
15 01 00 00 00 00 02 b5 00
/* Source EQ */
15 01 00 00 00 00 02 78 00
15 01 00 00 00 00 02 79 00
15 01 00 00 00 00 02 80 00
15 01 00 00 00 00 02 83 00
/* FP BP */
15 01 00 00 00 00 02 93 0a
15 01 00 00 00 00 02 94 0a
/* Inversion Type */
15 01 00 00 00 00 02 8a 00
15 01 00 00 00 00 02 9b ff
/* IMGSWAP =1 @PortSwap=1 */
15 01 00 00 00 00 02 9d b0
15 01 00 00 00 00 02 9f 63
15 01 00 00 00 00 02 98 10
/* FRM */
15 01 00 00 00 00 02 ec 00
/* CMD1 */
15 01 00 00 00 00 02 ff 10
/* VESA DSC PPS settings(1440x2560 slide 16H) */
39 01 00 00 00 00 11 c1 09 20 00 10 02 00 02 68 01
bb 00 0a 06 67 04 c5
39 01 00 00 00 00 03 c2 10 f0
/* C0h = 0x00(2 Port SDC); 0x01(1 PortA FBC);
* 0x02(MTK); 0x03(1 PortA VESA)
*/
15 01 00 00 00 00 02 c0 03
/* VBP+VSA=,VFP = 10H */
39 01 00 00 00 00 04 3b 03 0a 0a
/* FTE on */
15 01 00 00 00 00 02 35 00
/* EN_BK =1(auto black) */
15 01 00 00 00 00 02 e5 01
/* CMD mode(10) VDO mode(03) */
15 01 00 00 00 00 02 bb 03
/* Non Reload MTP */
15 01 00 00 00 00 02 fb 01
/* SlpOut + DispOn */
05 01 00 00 78 00 02 11 00
05 01 00 00 78 00 02 29 00
];
qcom,mdss-dsi-off-command = [05 01 00 00 78 00 02 28 00
05 01 00 00 78 00 02 10 00];
qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
qcom,mdss-dsi-h-sync-pulse = <0>;
qcom,mdss-dsi-traffic-mode = "non_burst_sync_event";
qcom,mdss-dsi-bllp-eof-power-mode;
qcom,mdss-dsi-bllp-power-mode;
qcom,mdss-dsi-lane-0-state;
qcom,mdss-dsi-lane-1-state;
qcom,mdss-dsi-lane-2-state;
qcom,mdss-dsi-lane-3-state;
qcom,mdss-dsi-panel-timings = [00 11 04 04 07 0c 04 04 03 03
04 00];
qcom,mdss-dsi-t-clk-post = <0xb>;
qcom,mdss-dsi-t-clk-pre = <0x23>;
qcom,mdss-dsi-dma-trigger = "trigger_sw";
qcom,mdss-dsi-mdp-trigger = "none";
qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>;
qcom,mdss-dsi-tx-eot-append;
qcom,mdss-pan-physical-width-dimension = <74>;
qcom,mdss-pan-physical-height-dimension = <131>;
qcom,compression-mode = "dsc";
qcom,config-select = <&dsi_nt35597_truly_dsc_video_config0>;
dsi_nt35597_truly_dsc_video_config0: config0 {
qcom,mdss-dsc-encoders = <1>;
qcom,mdss-dsc-slice-height = <16>;
qcom,mdss-dsc-slice-width = <720>;
qcom,mdss-dsc-slice-per-pkt = <2>;
qcom,mdss-dsc-bit-per-component = <8>;
qcom,mdss-dsc-bit-per-pixel = <8>;
qcom,mdss-dsc-block-prediction-enable;
};
dsi_nt35597_truly_dsc_video_config1: config1 {
qcom,lm-split = <720 720>;
qcom,mdss-dsc-encoders = <1>; /* 3D Mux */
qcom,mdss-dsc-slice-height = <16>;
qcom,mdss-dsc-slice-width = <720>;
qcom,mdss-dsc-slice-per-pkt = <2>;
qcom,mdss-dsc-bit-per-component = <8>;
qcom,mdss-dsc-bit-per-pixel = <8>;
qcom,mdss-dsc-block-prediction-enable;
};
dsi_nt35597_truly_dsc_video_config2: config2 {
qcom,lm-split = <720 720>;
qcom,mdss-dsc-encoders = <2>; /* DSC Merge */
qcom,mdss-dsc-slice-height = <16>;
qcom,mdss-dsc-slice-width = <720>;
qcom,mdss-dsc-slice-per-pkt = <2>;
qcom,mdss-dsc-bit-per-component = <8>;
qcom,mdss-dsc-bit-per-pixel = <8>;
qcom,mdss-dsc-block-prediction-enable;
};
};
};
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