Susheel Khiani 20a5dc1e2f iommu/arm-smmu: Request TZ to change page table format to V8L ... For targets where we have slave side protection, global register programming is handled by TZ. And since it supports V7S page table format only, by default TZ programs all context bank to permit V7S format by programming VA64 bit of CBA2R register as 0. But if context bank itself is non secure then its page tables are managed by HLOS where we can support V8L page table format. So, provide a way to request TZ to change page table format to V8L for non secure context banks. CRs-Fixed: 959535 Change-Id: I1f4d4b98c4f240a8351f791901abdfa78b829973 Signed-off-by: Susheel Khiani <skhiani@codeaurora.org>		2016-03-23 21:25:38 -07:00
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at91	ARM: at91: remove at91rm9200_sdramc.h	2015-05-20 16:37:55 +02:00
bcm2835	ARM: bcm2835: add mutual inclusion protection	2015-10-24 13:15:58 -07:00
brcmstb	soc: add stubs for brcmstb SoC's	2015-09-14 15:44:18 -07:00
imx	ARM: imx: define an enum for gpt timer device type	2015-06-03 14:52:26 +08:00
qcom	iommu/arm-smmu: Request TZ to change page table format to V8L	2016-03-23 21:25:38 -07:00
sa1100	ARM: 8361/1: sa1100: add platform functions to handle PWER settings	2015-05-18 22:00:22 +01:00
tegra	IOMMU Updates for Linux v4.3	2015-09-08 17:22:35 -07:00