Vineet Gupta f3e4de3274 ARC: cacheflush refactor #1: push aux reg ascertaining into leaf routine ... ARC dcache supports 3 ops - Inv, Flush, Flush-n-Inv. The programming model however provides 2 commands FLUSH, INV. INV will either discard or flush-n-discard (based on DT_CTRL bit) The leaf helper __dc_line_loop() used to take the AUX register (corresponding to the 2 commands). Now we push that to within the helper, paving way for code consolidations to follow. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>		2013-11-06 10:41:29 +05:30
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boot	ARC: Add some .gitignore entries	2013-08-26 09:40:24 +05:30
configs	Couple of Platform updates (Device Tree files primarily) given that the	2013-07-10 10:11:26 -07:00
include	ARC: Workaround spinlock livelock in SMP SystemC simulation	2013-09-27 16:28:48 +05:30
kernel	ARC: use __weak instead of __attribute__((weak))	2013-11-06 10:40:37 +05:30
lib	ARC: [lib] strchr breakage in Big-endian configuration	2013-08-24 11:24:53 -07:00
mm	ARC: cacheflush refactor #1: push aux reg ascertaining into leaf routine	2013-11-06 10:41:29 +05:30
oprofile	ARC: OProfile support	2013-02-15 23:16:00 +05:30
plat-arcfpga	Couple of Platform updates (Device Tree files primarily) given that the	2013-07-10 10:11:26 -07:00
plat-tb10x	ARC: [TB10x] Updates for irqchip driver	2013-06-28 15:07:42 +05:30
Kbuild
Kconfig	Remove GENERIC_HARDIRQ config option	2013-09-13 15:09:52 +02:00
Kconfig.debug	consolidate per-arch stack overflow debugging options	2013-07-04 11:25:39 -07:00
Makefile	ARC: Adjustments for gcc 4.8	2013-06-27 14:35:32 +05:30