c7dcb1fec0
The Allwinner A31 I2C controller is almost identical to the one used in the other Allwinner SoCs, except for the fact that it needs to clear the interrupt by setting the INT_FLAGS bit in the control register, instead of clearing it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
44 lines
1.3 KiB
Text
44 lines
1.3 KiB
Text
|
|
* Marvell MV64XXX I2C controller
|
|
|
|
Required properties :
|
|
|
|
- reg : Offset and length of the register set for the device
|
|
- compatible : Should be either:
|
|
- "allwinner,sun4i-i2c"
|
|
- "allwinner,sun6i-a31-i2c"
|
|
- "marvell,mv64xxx-i2c"
|
|
- "marvell,mv78230-i2c"
|
|
- "marvell,mv78230-a0-i2c"
|
|
* Note: Only use "marvell,mv78230-a0-i2c" for a
|
|
very rare, initial version of the SoC which
|
|
had broken offload support. Linux
|
|
auto-detects this and sets it appropriately.
|
|
- interrupts : The interrupt number
|
|
|
|
Optional properties :
|
|
|
|
- clock-frequency : Desired I2C bus clock frequency in Hz. If not set the
|
|
default frequency is 100kHz
|
|
|
|
- resets : phandle to the parent reset controller. Mandatory
|
|
whenever you're using the "allwinner,sun6i-a31-i2c"
|
|
compatible.
|
|
|
|
Examples:
|
|
|
|
i2c@11000 {
|
|
compatible = "marvell,mv64xxx-i2c";
|
|
reg = <0x11000 0x20>;
|
|
interrupts = <29>;
|
|
clock-frequency = <100000>;
|
|
};
|
|
|
|
For the Armada XP:
|
|
|
|
i2c@11000 {
|
|
compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
|
|
reg = <0x11000 0x100>;
|
|
interrupts = <29>;
|
|
clock-frequency = <100000>;
|
|
};
|