(cherry picked from commit 95ca0ee8636059ea2800dfbac9ecac6212d6b38f) This is a pure feature bits leaf. There are two AVX512 feature bits in it already which were handled as scattered bits, and three more from this leaf are going to be added for speculation control features. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Borislav Petkov <bp@suse.de> Cc: gnomes@lxorguk.ukuu.org.uk Cc: ak@linux.intel.com Cc: ashok.raj@intel.com Cc: dave.hansen@intel.com Cc: karahmed@amazon.de Cc: arjan@linux.intel.com Cc: torvalds@linux-foundation.org Cc: peterz@infradead.org Cc: bp@alien8.de Cc: pbonzini@redhat.com Cc: tim.c.chen@linux.intel.com Cc: gregkh@linux-foundation.org Link: https://lkml.kernel.org/r/1516896855-7642-2-git-send-email-dwmw@amazon.co.uk Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Srivatsa S. Bhat <srivatsa@csail.mit.edu> Reviewed-by: Matt Helsley (VMware) <matt.helsley@gmail.com> Reviewed-by: Alexey Makhalov <amakhalov@vmware.com> Reviewed-by: Bo Gan <ganb@vmware.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
246 lines
8.9 KiB
C
246 lines
8.9 KiB
C
#ifndef _ASM_X86_CPUFEATURE_H
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#define _ASM_X86_CPUFEATURE_H
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#include <asm/processor.h>
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#if defined(__KERNEL__) && !defined(__ASSEMBLY__)
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#include <asm/asm.h>
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#include <linux/bitops.h>
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enum cpuid_leafs
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{
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CPUID_1_EDX = 0,
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CPUID_8000_0001_EDX,
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CPUID_8086_0001_EDX,
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CPUID_LNX_1,
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CPUID_1_ECX,
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CPUID_C000_0001_EDX,
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CPUID_8000_0001_ECX,
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CPUID_LNX_2,
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CPUID_LNX_3,
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CPUID_7_0_EBX,
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CPUID_D_1_EAX,
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CPUID_F_0_EDX,
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CPUID_F_1_EDX,
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CPUID_8000_0008_EBX,
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CPUID_6_EAX,
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CPUID_8000_000A_EDX,
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CPUID_7_ECX,
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CPUID_8000_0007_EBX,
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CPUID_7_EDX,
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};
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#ifdef CONFIG_X86_FEATURE_NAMES
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extern const char * const x86_cap_flags[NCAPINTS*32];
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extern const char * const x86_power_flags[32];
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#define X86_CAP_FMT "%s"
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#define x86_cap_flag(flag) x86_cap_flags[flag]
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#else
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#define X86_CAP_FMT "%d:%d"
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#define x86_cap_flag(flag) ((flag) >> 5), ((flag) & 31)
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#endif
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/*
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* In order to save room, we index into this array by doing
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* X86_BUG_<name> - NCAPINTS*32.
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*/
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extern const char * const x86_bug_flags[NBUGINTS*32];
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#define test_cpu_cap(c, bit) \
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test_bit(bit, (unsigned long *)((c)->x86_capability))
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/*
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* There are 32 bits/features in each mask word. The high bits
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* (selected with (bit>>5) give us the word number and the low 5
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* bits give us the bit/feature number inside the word.
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* (1UL<<((bit)&31) gives us a mask for the feature_bit so we can
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* see if it is set in the mask word.
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*/
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#define CHECK_BIT_IN_MASK_WORD(maskname, word, bit) \
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(((bit)>>5)==(word) && (1UL<<((bit)&31) & maskname##word ))
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#define REQUIRED_MASK_BIT_SET(feature_bit) \
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( CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 0, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 1, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 2, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 3, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 4, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 5, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 6, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 7, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 8, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 9, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 10, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 11, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 12, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 13, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 14, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 15, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 16, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 17, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 18, feature_bit) || \
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REQUIRED_MASK_CHECK || \
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BUILD_BUG_ON_ZERO(NCAPINTS != 19))
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#define DISABLED_MASK_BIT_SET(feature_bit) \
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( CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 0, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 1, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 2, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 3, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 4, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 5, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 6, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 7, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 8, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 9, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 10, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 11, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 12, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 13, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 14, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 15, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 16, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 17, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 18, feature_bit) || \
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DISABLED_MASK_CHECK || \
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BUILD_BUG_ON_ZERO(NCAPINTS != 19))
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#define cpu_has(c, bit) \
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(__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
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test_cpu_cap(c, bit))
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#define this_cpu_has(bit) \
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(__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
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x86_this_cpu_test_bit(bit, (unsigned long *)&cpu_info.x86_capability))
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/*
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* This macro is for detection of features which need kernel
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* infrastructure to be used. It may *not* directly test the CPU
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* itself. Use the cpu_has() family if you want true runtime
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* testing of CPU features, like in hypervisor code where you are
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* supporting a possible guest feature where host support for it
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* is not relevant.
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*/
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#define cpu_feature_enabled(bit) \
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(__builtin_constant_p(bit) && DISABLED_MASK_BIT_SET(bit) ? 0 : static_cpu_has(bit))
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#define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit)
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#define set_cpu_cap(c, bit) set_bit(bit, (unsigned long *)((c)->x86_capability))
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#define clear_cpu_cap(c, bit) clear_bit(bit, (unsigned long *)((c)->x86_capability))
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#define setup_clear_cpu_cap(bit) do { \
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clear_cpu_cap(&boot_cpu_data, bit); \
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set_bit(bit, (unsigned long *)cpu_caps_cleared); \
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} while (0)
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#define setup_force_cpu_cap(bit) do { \
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set_cpu_cap(&boot_cpu_data, bit); \
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set_bit(bit, (unsigned long *)cpu_caps_set); \
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} while (0)
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#define setup_force_cpu_bug(bit) setup_force_cpu_cap(bit)
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#define cpu_has_fpu boot_cpu_has(X86_FEATURE_FPU)
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#define cpu_has_pse boot_cpu_has(X86_FEATURE_PSE)
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#define cpu_has_tsc boot_cpu_has(X86_FEATURE_TSC)
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#define cpu_has_pge boot_cpu_has(X86_FEATURE_PGE)
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#define cpu_has_apic boot_cpu_has(X86_FEATURE_APIC)
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#define cpu_has_fxsr boot_cpu_has(X86_FEATURE_FXSR)
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#define cpu_has_xmm boot_cpu_has(X86_FEATURE_XMM)
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#define cpu_has_xmm2 boot_cpu_has(X86_FEATURE_XMM2)
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#define cpu_has_aes boot_cpu_has(X86_FEATURE_AES)
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#define cpu_has_avx boot_cpu_has(X86_FEATURE_AVX)
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#define cpu_has_avx2 boot_cpu_has(X86_FEATURE_AVX2)
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#define cpu_has_clflush boot_cpu_has(X86_FEATURE_CLFLUSH)
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#define cpu_has_gbpages boot_cpu_has(X86_FEATURE_GBPAGES)
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#define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON)
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#define cpu_has_pat boot_cpu_has(X86_FEATURE_PAT)
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#define cpu_has_x2apic boot_cpu_has(X86_FEATURE_X2APIC)
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#define cpu_has_xsave boot_cpu_has(X86_FEATURE_XSAVE)
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#define cpu_has_xsaves boot_cpu_has(X86_FEATURE_XSAVES)
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#define cpu_has_osxsave boot_cpu_has(X86_FEATURE_OSXSAVE)
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#define cpu_has_hypervisor boot_cpu_has(X86_FEATURE_HYPERVISOR)
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/*
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* Do not add any more of those clumsy macros - use static_cpu_has() for
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* fast paths and boot_cpu_has() otherwise!
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*/
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#if defined(CC_HAVE_ASM_GOTO) && defined(CONFIG_X86_FAST_FEATURE_TESTS)
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/*
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* Static testing of CPU features. Used the same as boot_cpu_has().
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* These will statically patch the target code for additional
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* performance.
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*/
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static __always_inline __pure bool _static_cpu_has(u16 bit)
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{
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asm_volatile_goto("1: jmp 6f\n"
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"2:\n"
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".skip -(((5f-4f) - (2b-1b)) > 0) * "
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"((5f-4f) - (2b-1b)),0x90\n"
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"3:\n"
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".section .altinstructions,\"a\"\n"
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" .long 1b - .\n" /* src offset */
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" .long 4f - .\n" /* repl offset */
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" .word %P1\n" /* always replace */
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" .byte 3b - 1b\n" /* src len */
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" .byte 5f - 4f\n" /* repl len */
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" .byte 3b - 2b\n" /* pad len */
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".previous\n"
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".section .altinstr_replacement,\"ax\"\n"
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"4: jmp %l[t_no]\n"
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"5:\n"
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".previous\n"
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".section .altinstructions,\"a\"\n"
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" .long 1b - .\n" /* src offset */
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" .long 0\n" /* no replacement */
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" .word %P0\n" /* feature bit */
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" .byte 3b - 1b\n" /* src len */
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" .byte 0\n" /* repl len */
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" .byte 0\n" /* pad len */
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".previous\n"
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".section .altinstr_aux,\"ax\"\n"
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"6:\n"
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" testb %[bitnum],%[cap_byte]\n"
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" jnz %l[t_yes]\n"
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" jmp %l[t_no]\n"
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".previous\n"
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: : "i" (bit), "i" (X86_FEATURE_ALWAYS),
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[bitnum] "i" (1 << (bit & 7)),
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[cap_byte] "m" (((const char *)boot_cpu_data.x86_capability)[bit >> 3])
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: : t_yes, t_no);
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t_yes:
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return true;
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t_no:
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return false;
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}
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#define static_cpu_has(bit) \
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( \
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__builtin_constant_p(boot_cpu_has(bit)) ? \
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boot_cpu_has(bit) : \
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_static_cpu_has(bit) \
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)
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#else
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/*
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* Fall back to dynamic for gcc versions which don't support asm goto. Should be
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* a minority now anyway.
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*/
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#define static_cpu_has(bit) boot_cpu_has(bit)
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#endif
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#define cpu_has_bug(c, bit) cpu_has(c, (bit))
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#define set_cpu_bug(c, bit) set_cpu_cap(c, (bit))
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#define clear_cpu_bug(c, bit) clear_cpu_cap(c, (bit))
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#define static_cpu_has_bug(bit) static_cpu_has((bit))
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#define boot_cpu_has_bug(bit) cpu_has_bug(&boot_cpu_data, (bit))
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#define MAX_CPU_FEATURES (NCAPINTS * 32)
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#define cpu_have_feature boot_cpu_has
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#define CPU_FEATURE_TYPEFMT "x86,ven%04Xfam%04Xmod%04X"
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#define CPU_FEATURE_TYPEVAL boot_cpu_data.x86_vendor, boot_cpu_data.x86, \
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boot_cpu_data.x86_model
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#endif /* defined(__KERNEL__) && !defined(__ASSEMBLY__) */
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#endif /* _ASM_X86_CPUFEATURE_H */
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