Rafael Barbalho fd1ab8f48c drm/i915/chv: Flush caches when programming page tables ... Page table updates were getting stuck in the CPU cache on chv causing spurious page faults and strange behaviour. Signed-off-by: Rafael Barbalho <rafael.barbalho@intel.com> [vsyrjala: Add !HAS_LLC checks] Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>		2014-05-06 18:30:08 +02:00
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drm	drm/i915/chv: Flush caches when programming page tables	2014-05-06 18:30:08 +02:00
host1x	gpu: host1x: handle the correct # of syncpt regs	2014-04-16 17:11:04 +02:00
vga
Makefile