2005-04-16 15:20:36 -07:00
|
|
|
#ifndef __ASM_CPU_SH4_DMA_H
|
|
|
|
#define __ASM_CPU_SH4_DMA_H
|
|
|
|
|
2012-05-18 17:27:28 +09:00
|
|
|
#include <linux/sh_intc.h>
|
|
|
|
|
2009-03-10 17:26:49 +09:00
|
|
|
/*
|
|
|
|
* SH7750/SH7751/SH7760
|
|
|
|
*/
|
2012-05-18 17:27:28 +09:00
|
|
|
#define DMTE0_IRQ evt2irq(0x640)
|
|
|
|
#define DMTE4_IRQ evt2irq(0x780)
|
|
|
|
#define DMTE6_IRQ evt2irq(0x7c0)
|
|
|
|
#define DMAE0_IRQ evt2irq(0x6c0)
|
2005-04-16 15:20:36 -07:00
|
|
|
|
2009-03-10 17:26:49 +09:00
|
|
|
#define SH_DMAC_BASE0 0xffa00000
|
|
|
|
#define SH_DMAC_BASE1 0xffa00070
|
2012-05-19 18:06:12 +09:00
|
|
|
|
2006-01-16 22:14:09 -08:00
|
|
|
#endif /* __ASM_CPU_SH4_DMA_H */
|