evie/android_kernel_oneplus_msm8998
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scsi: ufs-qcom: fix device reference clock control handling

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UFS device reference clock control has moved inside UFS controller register
address space for newer Qualcomm chipsets and if we try to do ioremp on the
corresponding memory address then it would fail as the same memory address
space is already ioremapped.
This issue is fixed by removing the requirement of passing reference clock
control register address space resource via device tree node for newer
chipsets.

Change-Id: I8d93f9856d33d3b300bd7994d1dff1d1be84596d
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
[subhashj@codeaurora.org: resolved merge conflicts, skipped changes to
msmthulium.dtsi]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
This commit is contained in:
Subhash Jadavani 2015-01-26 16:23:57 -08:00 • committed by David Keitel
parent ddc6e01269
commit 061c93d4f1
1 changed files with 20 additions and 16 deletions
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36
drivers/scsi/ufs/ufs-qcom.c
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@ -1300,24 +1300,28 @@ static int ufs_qcom_init(struct ufs_hba *hba)
ufs_qcom_get_controller_revision(hba, &host->hw_ver.major, ufs_qcom_get_controller_revision(hba, &host->hw_ver.major,
&host->hw_ver.minor, &host->hw_ver.step); &host->hw_ver.minor, &host->hw_ver.step);
/* "dev_ref_clk_ctrl_mem" is optional resource */ /*
res = platform_get_resource(pdev, IORESOURCE_MEM, 1); * for newer controllers, device reference clock control bit has
if (!res) { * moved inside UFS controller register address space itself.
dev_info(dev, "%s: dev_ref_clk_ctrl_mem resource not found\n", */
__func__); if (host->hw_ver.major >= 0x02) {
host->dev_ref_clk_ctrl_mmio = hba->mmio_base + REG_UFS_CFG1;
host->dev_ref_clk_en_mask = BIT(26);
} else { } else {
host->dev_ref_clk_ctrl_mmio = devm_ioremap_resource(dev, res); /* "dev_ref_clk_ctrl_mem" is optional resource */
if (IS_ERR(host->dev_ref_clk_ctrl_mmio)) { res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
dev_warn(dev, if (res) {
"%s: could not map dev_ref_clk_ctrl_mmio, err %ld\n", host->dev_ref_clk_ctrl_mmio =
__func__, PTR_ERR(host->dev_ref_clk_ctrl_mmio)); devm_ioremap_resource(dev, res);
host->dev_ref_clk_ctrl_mmio = NULL; if (IS_ERR(host->dev_ref_clk_ctrl_mmio)) {
} dev_warn(dev,
/* Set the correct mask for the device ref. clock enable bit */ "%s: could not map dev_ref_clk_ctrl_mmio, err %ld\n",
if (host->hw_ver.major >= 0x02) __func__,
host->dev_ref_clk_en_mask = BIT(26); PTR_ERR(host->dev_ref_clk_ctrl_mmio));
else host->dev_ref_clk_ctrl_mmio = NULL;
}
host->dev_ref_clk_en_mask = BIT(5); host->dev_ref_clk_en_mask = BIT(5);
}
} }
/* update phy revision information before calling phy_init() */ /* update phy revision information before calling phy_init() */