evie/android_kernel_oneplus_msm8998
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Merge "defconfig: msm: Enable MSM_TIMER_LEAP"

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Linux Build Service Account 2017-01-14 12:24:45 -08:00 • committed by Gerrit - the friendly Code Review server
commit 2e830e63e4
4 changed files with 18 additions and 0 deletions
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1
arch/arm64/configs/msmcortex-perf_defconfig
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@ -496,6 +496,7 @@ CONFIG_SEEMP_CORE=y
CONFIG_USB_BAM=y
CONFIG_MSM_MDSS_PLL=y
CONFIG_REMOTE_SPINLOCK_MSM=y
CONFIG_MSM_TIMER_LEAP=y
CONFIG_IOMMU_IO_PGTABLE_FAST=y
CONFIG_ARM_SMMU=y
CONFIG_IOMMU_DEBUG=y

1
arch/arm64/configs/msmcortex_defconfig
View file

@ -504,6 +504,7 @@ CONFIG_SEEMP_CORE=y
CONFIG_USB_BAM=y
CONFIG_MSM_MDSS_PLL=y
CONFIG_REMOTE_SPINLOCK_MSM=y
CONFIG_MSM_TIMER_LEAP=y
CONFIG_IOMMU_IO_PGTABLE_FAST=y
CONFIG_IOMMU_IO_PGTABLE_FAST_SELFTEST=y
CONFIG_ARM_SMMU=y

7
arch/arm64/include/asm/arch_timer.h
View file

@ -119,7 +119,14 @@ static inline u64 arch_counter_get_cntvct(void)
u64 cval;
isb();
#if IS_ENABLED(CONFIG_MSM_TIMER_LEAP)
#define L32_BITS 0x00000000FFFFFFFF
do {
asm volatile("mrs %0, cntvct_el0" : "=r" (cval));
} while ((cval & L32_BITS) == L32_BITS);
#else
asm volatile("mrs %0, cntvct_el0" : "=r" (cval));
#endif
return cval;
}

9
drivers/clocksource/Kconfig
View file

@ -158,6 +158,15 @@ config ARM_ARCH_TIMER_EVTSTREAM
This must be disabled for hardware validation purposes to detect any
hardware anomalies of missing events.
config MSM_TIMER_LEAP
bool "ARCH TIMER counter rollover"
default n
depends on ARM_ARCH_TIMER && ARM64
help
This option enables a check for least significant 32 bits of
counter rollover. On every counter read if least significant
32 bits are set, reread counter.
config ARM_GLOBAL_TIMER
bool
select CLKSRC_OF if OF