ARM: dts: msm: limit the maximum PCLK supported for DP on SDM660

Update the dtsi property to limit the maximum pixel clock frequency
supported on Display Port for SDM660 to 300 MHz.

Change-Id: Iaacb08a310debd0d470d2f16c794fe70b09af2f5
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
This commit is contained in:
Padmanabhan Komanduru 2017-02-09 17:12:33 +05:30
parent d24550bbf5
commit 399804a90e

View file

@ -494,7 +494,7 @@
qcom,aux-cfg-settings = [00 13 00 00 0a 28 0a 03 b7 03];
qcom,logical2physical-lane-map = [00 01 02 03];
qcom,phy-register-offset = <0x4>;
qcom,max-pclk-frequency-khz = <593470>;
qcom,max-pclk-frequency-khz = <300000>;
qcom,core-supply-entries {
#address-cells = <1>;