ARM: dts: msm: Camera configuration for msmfalcon interposer

1. Voltage regulator changes for rear camera
   and eeprom.
2. Gpio changes for rear camera and eeprom.

Change-Id: Ie59a748d016211d5ddbab2593ec310a313690f9e
Signed-off-by: Shankar Ravi <rshankar@codeaurora.org>
This commit is contained in:
Shankar Ravi 2016-11-02 17:49:42 +05:30
parent b459804296
commit 5e13a312f7
5 changed files with 450 additions and 11 deletions

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@ -0,0 +1,224 @@
/*
* Copyright (c) 2016, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&soc {
qcom,csiphy@ca34000 {
qcom,clock-rates = <0 0 0 0 0 0 384000000 0 0 269333333 0
0 384000000 0>;
};
qcom,csiphy@ca35000 {
qcom,clock-rates = <0 0 0 0 0 0 384000000 0 0 269333333 0
0 384000000 0>;
};
qcom,csiphy@ca36000 {
qcom,clock-rates = <0 0 0 0 0 0 384000000 0 0 269333333 0
0 384000000 0>;
};
qcom,csid@ca30000 {
qcom,csi-vdd-voltage = <1225000>;
qcom,mipi-csi-vdd-supply = <&pmfalcon_l1>;
gdscr-supply = <&gdsc_camss_top>;
vdd_sec-supply = <&pm2falcon_l1>;
bimc_smmu-supply = <&gdsc_bimc_smmu>;
qcom,cam-vreg-name = "vdd_sec", "gdscr", "bimc_smmu";
qcom,clock-rates = <0 0 0 0 0 0 0 384000000 384000000
0 0 0 0 0>;
};
qcom,csid@ca30400 {
qcom,csi-vdd-voltage = <1225000>;
qcom,mipi-csi-vdd-supply = <&pmfalcon_l1>;
gdscr-supply = <&gdsc_camss_top>;
vdd_sec-supply = <&pm2falcon_l1>;
bimc_smmu-supply = <&gdsc_bimc_smmu>;
qcom,cam-vreg-name = "vdd_sec", "gdscr", "bimc_smmu";
qcom,clock-rates = <0 0 0 0 0 0 0 384000000 384000000
0 0 0 0 0>;
};
qcom,csid@ca30800 {
qcom,csi-vdd-voltage = <1225000>;
qcom,mipi-csi-vdd-supply = <&pmfalcon_l1>;
gdscr-supply = <&gdsc_camss_top>;
vdd_sec-supply = <&pm2falcon_l1>;
bimc_smmu-supply = <&gdsc_bimc_smmu>;
qcom,cam-vreg-name = "vdd_sec", "gdscr", "bimc_smmu";
qcom,clock-rates = <0 0 0 0 0 0 0 384000000 384000000
0 0 0 0 0>;
};
qcom,csid@ca30c00 {
qcom,csi-vdd-voltage = <1225000>;
qcom,mipi-csi-vdd-supply = <&pmfalcon_l1>;
gdscr-supply = <&gdsc_camss_top>;
vdd_sec-supply = <&pm2falcon_l1>;
bimc_smmu-supply = <&gdsc_bimc_smmu>;
qcom,cam-vreg-name = "vdd_sec", "gdscr", "bimc_smmu";
qcom,clock-rates = <0 0 0 0 0 0 0 384000000 384000000
0 0 0 0 0>;
};
};
&cci {
actuator0: qcom,actuator@0 {
cell-index = <0>;
reg = <0x0>;
compatible = "qcom,actuator";
qcom,cci-master = <0>;
gpios = <&tlmm 27 0>;
qcom,gpio-vaf = <0>;
qcom,gpio-req-tbl-num = <0>;
qcom,gpio-req-tbl-flags = <0>;
qcom,gpio-req-tbl-label = "CAM_VAF";
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_actuator_vaf_active>;
pinctrl-1 = <&cam_actuator_vaf_suspend>;
};
actuator1: qcom,actuator@1 {
cell-index = <1>;
reg = <0x1>;
compatible = "qcom,actuator";
qcom,cci-master = <1>;
gpios = <&tlmm 27 0>;
qcom,gpio-vaf = <0>;
qcom,gpio-req-tbl-num = <0>;
qcom,gpio-req-tbl-flags = <0>;
qcom,gpio-req-tbl-label = "CAM_VAF";
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_actuator_vaf_active>;
pinctrl-1 = <&cam_actuator_vaf_suspend>;
};
ois0: qcom,ois@0 {
cell-index = <0>;
reg = <0x0>;
compatible = "qcom,ois";
qcom,cci-master = <0>;
gpios = <&tlmm 27 0>;
qcom,gpio-vaf = <0>;
qcom,gpio-req-tbl-num = <0>;
qcom,gpio-req-tbl-flags = <0>;
qcom,gpio-req-tbl-label = "CAM_VAF";
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_actuator_vaf_active>;
pinctrl-1 = <&cam_actuator_vaf_suspend>;
status = "disabled";
};
eeprom0: qcom,eeprom@0 {
cell-index = <0>;
reg = <0>;
compatible = "qcom,eeprom";
cam_vio-supply = <&pmfalcon_l11>;
cam_vana-supply = <&pm2falcon_bob>;
cam_vdig-supply = <&pmfalcon_s5>;
qcom,cam-vreg-name = "cam_vio", "cam_vana", "cam_vdig";
qcom,cam-vreg-min-voltage = <0 3300000 1350000>;
qcom,cam-vreg-max-voltage = <0 3600000 1350000>;
qcom,cam-vreg-op-mode = <0 80000 105000>;
qcom,gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk0_active
&cam_sensor_rear_active
&cam_actuator_vaf_active>;
pinctrl-1 = <&cam_sensor_mclk0_suspend
&cam_sensor_rear_suspend
&cam_actuator_vaf_suspend>;
gpios = <&tlmm 13 0>,
<&tlmm 30 0>,
<&pmfalcon_gpios 4 0>,
<&tlmm 29 0>,
<&tlmm 27 0>;
qcom,gpio-reset = <1>;
qcom,gpio-vdig = <2>;
qcom,gpio-vana = <3>;
qcom,gpio-vaf = <4>;
qcom,gpio-req-tbl-num = <0 1 2 3 4>;
qcom,gpio-req-tbl-flags = <1 0 0 0 0>;
qcom,gpio-req-tbl-label = "CAMIF_MCLK0",
"CAM_RESET0",
"CAM_VDIG",
"CAM_VANA",
"CAM_VAF";
qcom,sensor-position = <0>;
qcom,sensor-mode = <0>;
qcom,cci-master = <0>;
status = "ok";
clocks = <&clock_mmss clk_mclk0_clk_src>,
<&clock_mmss clk_mmss_camss_mclk0_clk>;
clock-names = "cam_src_clk", "cam_clk";
qcom,clock-rates = <24000000 0>;
};
qcom,camera@0 {
cell-index = <0>;
compatible = "qcom,camera";
reg = <0x0>;
qcom,csiphy-sd-index = <0>;
qcom,csid-sd-index = <0>;
qcom,mount-angle = <270>;
qcom,actuator-src = <&actuator0>;
qcom,ois-src = <&ois0>;
qcom,eeprom-src = <&eeprom0>;
cam_vio-supply = <&pmfalcon_l11>;
cam_vana-supply = <&pm2falcon_bob>;
cam_vdig-supply = <&pmfalcon_s5>;
qcom,cam-vreg-name = "cam_vio", "cam_vana", "cam_vdig";
qcom,cam-vreg-min-voltage = <0 3300000 1350000>;
qcom,cam-vreg-max-voltage = <0 3600000 1350000>;
qcom,cam-vreg-op-mode = <0 80000 105000>;
qcom,gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk0_active
&cam_sensor_rear_active>;
pinctrl-1 = <&cam_sensor_mclk0_suspend
&cam_sensor_rear_suspend>;
gpios = <&tlmm 13 0>,
<&tlmm 30 0>,
<&pmfalcon_gpios 4 0>,
<&tlmm 29 0>;
qcom,gpio-reset = <1>;
qcom,gpio-vdig = <2>;
qcom,gpio-vana = <3>;
qcom,gpio-req-tbl-num = <0 1 2 3>;
qcom,gpio-req-tbl-flags = <1 0 0 0>;
qcom,gpio-req-tbl-label = "CAMIF_MCLK0",
"CAM_RESET0",
"CAM_VDIG",
"CAM_VANA";
qcom,sensor-position = <0>;
qcom,sensor-mode = <0>;
qcom,cci-master = <0>;
status = "ok";
clocks = <&clock_mmss clk_mclk0_clk_src>,
<&clock_mmss clk_mmss_camss_mclk0_clk>;
clock-names = "cam_src_clk", "cam_clk";
qcom,clock-rates = <24000000 0>;
};
};
&pmfalcon_gpios {
gpio@c300 { /* GPIO4 -CAMERA SENSOR 0 VDIG*/
qcom,mode = <1>; /* Output */
qcom,pull = <5>; /* No Pull */
qcom,vin-sel = <0>; /* VIN1 GPIO_LV */
qcom,src-sel = <0>; /* GPIO */
qcom,invert = <0>; /* Invert */
qcom,master-en = <1>; /* Enable GPIO */
status = "ok";
};
};

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@ -0,0 +1,224 @@
/*
* Copyright (c) 2016, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&soc {
qcom,csiphy@ca34000 {
qcom,clock-rates = <0 0 0 0 0 0 384000000 0 0 269333333 0
0 384000000 0>;
};
qcom,csiphy@ca35000 {
qcom,clock-rates = <0 0 0 0 0 0 384000000 0 0 269333333 0
0 384000000 0>;
};
qcom,csiphy@ca36000 {
qcom,clock-rates = <0 0 0 0 0 0 384000000 0 0 269333333 0
0 384000000 0>;
};
qcom,csid@ca30000 {
qcom,csi-vdd-voltage = <1225000>;
qcom,mipi-csi-vdd-supply = <&pmfalcon_l1>;
gdscr-supply = <&gdsc_camss_top>;
vdd_sec-supply = <&pm2falcon_l1>;
bimc_smmu-supply = <&gdsc_bimc_smmu>;
qcom,cam-vreg-name = "vdd_sec", "gdscr", "bimc_smmu";
qcom,clock-rates = <0 0 0 0 0 0 0 384000000 384000000
0 0 0 0 0>;
};
qcom,csid@ca30400 {
qcom,csi-vdd-voltage = <1225000>;
qcom,mipi-csi-vdd-supply = <&pmfalcon_l1>;
gdscr-supply = <&gdsc_camss_top>;
vdd_sec-supply = <&pm2falcon_l1>;
bimc_smmu-supply = <&gdsc_bimc_smmu>;
qcom,cam-vreg-name = "vdd_sec", "gdscr", "bimc_smmu";
qcom,clock-rates = <0 0 0 0 0 0 0 384000000 384000000
0 0 0 0 0>;
};
qcom,csid@ca30800 {
qcom,csi-vdd-voltage = <1225000>;
qcom,mipi-csi-vdd-supply = <&pmfalcon_l1>;
gdscr-supply = <&gdsc_camss_top>;
vdd_sec-supply = <&pm2falcon_l1>;
bimc_smmu-supply = <&gdsc_bimc_smmu>;
qcom,cam-vreg-name = "vdd_sec", "gdscr", "bimc_smmu";
qcom,clock-rates = <0 0 0 0 0 0 0 384000000 384000000
0 0 0 0 0>;
};
qcom,csid@ca30c00 {
qcom,csi-vdd-voltage = <1225000>;
qcom,mipi-csi-vdd-supply = <&pmfalcon_l1>;
gdscr-supply = <&gdsc_camss_top>;
vdd_sec-supply = <&pm2falcon_l1>;
bimc_smmu-supply = <&gdsc_bimc_smmu>;
qcom,cam-vreg-name = "vdd_sec", "gdscr", "bimc_smmu";
qcom,clock-rates = <0 0 0 0 0 0 0 384000000 384000000
0 0 0 0 0>;
};
};
&cci {
actuator0: qcom,actuator@0 {
cell-index = <0>;
reg = <0x0>;
compatible = "qcom,actuator";
qcom,cci-master = <0>;
gpios = <&tlmm 27 0>;
qcom,gpio-vaf = <0>;
qcom,gpio-req-tbl-num = <0>;
qcom,gpio-req-tbl-flags = <0>;
qcom,gpio-req-tbl-label = "CAM_VAF";
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_actuator_vaf_active>;
pinctrl-1 = <&cam_actuator_vaf_suspend>;
};
actuator1: qcom,actuator@1 {
cell-index = <1>;
reg = <0x1>;
compatible = "qcom,actuator";
qcom,cci-master = <1>;
gpios = <&tlmm 27 0>;
qcom,gpio-vaf = <0>;
qcom,gpio-req-tbl-num = <0>;
qcom,gpio-req-tbl-flags = <0>;
qcom,gpio-req-tbl-label = "CAM_VAF";
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_actuator_vaf_active>;
pinctrl-1 = <&cam_actuator_vaf_suspend>;
};
ois0: qcom,ois@0 {
cell-index = <0>;
reg = <0x0>;
compatible = "qcom,ois";
qcom,cci-master = <0>;
gpios = <&tlmm 27 0>;
qcom,gpio-vaf = <0>;
qcom,gpio-req-tbl-num = <0>;
qcom,gpio-req-tbl-flags = <0>;
qcom,gpio-req-tbl-label = "CAM_VAF";
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_actuator_vaf_active>;
pinctrl-1 = <&cam_actuator_vaf_suspend>;
status = "disabled";
};
eeprom0: qcom,eeprom@0 {
cell-index = <0>;
reg = <0>;
compatible = "qcom,eeprom";
cam_vio-supply = <&pmfalcon_l11>;
cam_vana-supply = <&pm2falcon_bob>;
cam_vdig-supply = <&pmfalcon_s5>;
qcom,cam-vreg-name = "cam_vio", "cam_vana", "cam_vdig";
qcom,cam-vreg-min-voltage = <0 3300000 1350000>;
qcom,cam-vreg-max-voltage = <0 3600000 1350000>;
qcom,cam-vreg-op-mode = <0 80000 105000>;
qcom,gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk0_active
&cam_sensor_rear_active
&cam_actuator_vaf_active>;
pinctrl-1 = <&cam_sensor_mclk0_suspend
&cam_sensor_rear_suspend
&cam_actuator_vaf_suspend>;
gpios = <&tlmm 13 0>,
<&tlmm 30 0>,
<&pmfalcon_gpios 4 0>,
<&tlmm 29 0>,
<&tlmm 27 0>;
qcom,gpio-reset = <1>;
qcom,gpio-vdig = <2>;
qcom,gpio-vana = <3>;
qcom,gpio-vaf = <4>;
qcom,gpio-req-tbl-num = <0 1 2 3 4>;
qcom,gpio-req-tbl-flags = <1 0 0 0 0>;
qcom,gpio-req-tbl-label = "CAMIF_MCLK0",
"CAM_RESET0",
"CAM_VDIG",
"CAM_VANA",
"CAM_VAF";
qcom,sensor-position = <0>;
qcom,sensor-mode = <0>;
qcom,cci-master = <0>;
status = "ok";
clocks = <&clock_mmss clk_mclk0_clk_src>,
<&clock_mmss clk_mmss_camss_mclk0_clk>;
clock-names = "cam_src_clk", "cam_clk";
qcom,clock-rates = <24000000 0>;
};
qcom,camera@0 {
cell-index = <0>;
compatible = "qcom,camera";
reg = <0x0>;
qcom,csiphy-sd-index = <0>;
qcom,csid-sd-index = <0>;
qcom,mount-angle = <270>;
qcom,actuator-src = <&actuator0>;
qcom,ois-src = <&ois0>;
qcom,eeprom-src = <&eeprom0>;
cam_vio-supply = <&pmfalcon_l11>;
cam_vana-supply = <&pm2falcon_bob>;
cam_vdig-supply = <&pmfalcon_s5>;
qcom,cam-vreg-name = "cam_vio", "cam_vana", "cam_vdig";
qcom,cam-vreg-min-voltage = <0 3300000 1350000>;
qcom,cam-vreg-max-voltage = <0 3600000 1350000>;
qcom,cam-vreg-op-mode = <0 80000 105000>;
qcom,gpio-no-mux = <0>;
pinctrl-names = "cam_default", "cam_suspend";
pinctrl-0 = <&cam_sensor_mclk0_active
&cam_sensor_rear_active>;
pinctrl-1 = <&cam_sensor_mclk0_suspend
&cam_sensor_rear_suspend>;
gpios = <&tlmm 13 0>,
<&tlmm 30 0>,
<&pmfalcon_gpios 4 0>,
<&tlmm 29 0>;
qcom,gpio-reset = <1>;
qcom,gpio-vdig = <2>;
qcom,gpio-vana = <3>;
qcom,gpio-req-tbl-num = <0 1 2 3>;
qcom,gpio-req-tbl-flags = <1 0 0 0>;
qcom,gpio-req-tbl-label = "CAMIF_MCLK0",
"CAM_RESET0",
"CAM_VDIG",
"CAM_VANA";
qcom,sensor-position = <0>;
qcom,sensor-mode = <0>;
qcom,cci-master = <0>;
status = "ok";
clocks = <&clock_mmss clk_mclk0_clk_src>,
<&clock_mmss clk_mmss_camss_mclk0_clk>;
clock-names = "cam_src_clk", "cam_clk";
qcom,clock-rates = <24000000 0>;
};
};
&pmfalcon_gpios {
gpio@c300 { /* GPIO4 -CAMERA SENSOR 0 VDIG*/
qcom,mode = <1>; /* Output */
qcom,pull = <5>; /* No Pull */
qcom,vin-sel = <0>; /* VIN1 GPIO_LV */
qcom,src-sel = <0>; /* GPIO */
qcom,invert = <0>; /* Invert */
qcom,master-en = <1>; /* Enable GPIO */
status = "ok";
};
};

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@ -45,12 +45,6 @@
/delete-property/qcom,switch-source;
};
&eeprom0 {
/delete-property/cam_vio-supply;
/delete-property/cam_vana-supply;
/delete-property/cam_vdig-supply;
/delete-property/gpios;
};
&eeprom1 {
/delete-property/cam_vio-supply;
@ -66,7 +60,6 @@
};
&cci {
/delete-node/qcom,camera@0;
/delete-node/qcom,camera@1;
/delete-node/qcom,camera@2;
@ -220,10 +213,6 @@
};
&soc {
/delete-node/qcom,csid@ca30000;
/delete-node/qcom,csid@ca30400;
/delete-node/qcom,csid@ca30800;
/delete-node/qcom,csid@ca30c00;
/delete-node/gpio_keys;
/delete-node/qcom,lpass@17300000;
/delete-node/qcom,mss@4080000;

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@ -17,6 +17,7 @@
#include "msm8998-interposer-msmfalcon-cdp.dtsi"
#include "msm8998-interposer-pmfalcon.dtsi"
#include "msm8998-interposer-msmfalcon-audio.dtsi"
#include "msm8998-interposer-camera-sensor-cdp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. MSM 8998 v2.1 MSM FALCON Interposer CDP";

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@ -17,6 +17,7 @@
#include "msm8998-interposer-msmfalcon-mtp.dtsi"
#include "msm8998-interposer-pmfalcon.dtsi"
#include "msm8998-interposer-msmfalcon-audio.dtsi"
#include "msm8998-interposer-camera-sensor-mtp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. MSM 8998 v2.1 MSM FALCON Interposer MTP";