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arm64: kernel: Update PERCPU_SECTION and RW_DATA_SECTION alignment

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Update PERCPU_SECTION and RW_DATA_SECTION to align to L1_CACHE_BYTES
instead of hard coded 64 bytes since L1_CACHE_BYTES could get
updated to more than 64 bytes cacheline size.

Change-Id: I0bc1f0420675cf65e958c53a230357918f05aabc
Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org>
This commit is contained in:
Sarangdhar Joshi 2015-12-08 19:11:02 -08:00 • committed by David Keitel
parent 05f3cbbe5c
commit 78df37581d
1 changed files with 1 additions and 0 deletions
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arch/arm64/kernel/vmlinux.lds.S
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@ -11,6 +11,7 @@
#include <asm/memory.h> #include <asm/memory.h>
#include <asm/page.h> #include <asm/page.h>
#include <asm/pgtable.h> #include <asm/pgtable.h>
#include <asm/cache.h>
#include "image.h" #include "image.h"