msm: mdss: Balance clock requests in histogram enable
Balance the clock requests in histogram enable to prevent clocks from being left on. Change-Id: I45fc029049b68cceb56d0dc40f7819aca0625a58 Signed-off-by: Carl Vanderlip <carlv@codeaurora.org>
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1 changed files with 3 additions and 4 deletions
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@ -2771,7 +2771,7 @@ int mdss_mdp_histogram_start(struct mdp_histogram_start_req *req)
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if (!i) {
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if (!i) {
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ret = -EINVAL;
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ret = -EINVAL;
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pr_warn("Must pass pipe arguments, %d", i);
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pr_warn("Must pass pipe arguments, %d", i);
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goto hist_exit;
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goto hist_stop_clk;
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}
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}
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for (i = 0; i < MDSS_PP_ARG_NUM; i++) {
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for (i = 0; i < MDSS_PP_ARG_NUM; i++) {
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@ -2781,10 +2781,9 @@ int mdss_mdp_histogram_start(struct mdp_histogram_start_req *req)
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if (IS_ERR_OR_NULL(pipe))
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if (IS_ERR_OR_NULL(pipe))
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continue;
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continue;
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if (!pipe || pipe->num > MDSS_MDP_SSPP_VIG2) {
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if (!pipe || pipe->num > MDSS_MDP_SSPP_VIG2) {
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mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
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ret = -EINVAL;
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ret = -EINVAL;
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pr_warn("Invalid Hist pipe (%d)", i);
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pr_warn("Invalid Hist pipe (%d)", i);
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goto hist_exit;
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goto hist_stop_clk;
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}
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}
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done_shift_bit = (pipe->num * 4);
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done_shift_bit = (pipe->num * 4);
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hist_info = &pipe->pp_res.hist;
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hist_info = &pipe->pp_res.hist;
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@ -2807,8 +2806,8 @@ int mdss_mdp_histogram_start(struct mdp_histogram_start_req *req)
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PP_FLAGS_DIRTY_HIST_COL;
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PP_FLAGS_DIRTY_HIST_COL;
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}
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}
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}
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}
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hist_stop_clk:
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mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
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mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
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hist_exit:
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hist_exit:
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return ret;
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return ret;
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}
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}
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