iommu/arm-smmu: change IOMMU_EXEC to IOMMU_NOEXEC
Exposing the XN flag of the SMMU driver as IOMMU_NOEXEC instead of
IOMMU_EXEC makes it enforceable, since for IOMMUs that don't support
the XN flag pages will always be executable.
Change-Id: Ib785acd8a188fa95aea9991116139a392862764e
Signed-off-by: Antonios Motakis <a.motakis@virtualopensystems.com>
Acked-by: Joerg Roedel <jroedel@suse.de>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Git-commit: a720b41c41
[rvaswani@codeaurora.org: resolve trivial merge conflicts]
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
This commit is contained in:
parent
cccb557b54
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86d54e985a
2 changed files with 6 additions and 5 deletions
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@ -1645,7 +1645,7 @@ static int arm_smmu_alloc_init_pte(struct arm_smmu_domain *smmu_domain,
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unsigned long pfn, int prot, int stage)
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{
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pte_t *pte, *start;
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pteval_t pteval = ARM_SMMU_PTE_PAGE | ARM_SMMU_PTE_AF | ARM_SMMU_PTE_XN;
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pteval_t pteval = ARM_SMMU_PTE_PAGE | ARM_SMMU_PTE_AF;
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int ret;
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if (pmd_none(*pmd)) {
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@ -1695,10 +1695,11 @@ static int arm_smmu_alloc_init_pte(struct arm_smmu_domain *smmu_domain,
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pteval |= ARM_SMMU_PTE_MEMATTR_DEV;
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}
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if (prot & IOMMU_NOEXEC)
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pteval |= ARM_SMMU_PTE_XN;
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/* If no access, create a faulting entry to avoid TLB fills */
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if (prot & IOMMU_EXEC)
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pteval &= ~ARM_SMMU_PTE_XN;
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else if (!(prot & (IOMMU_READ | IOMMU_WRITE)))
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if (!(prot & (IOMMU_READ | IOMMU_WRITE)))
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pteval &= ~ARM_SMMU_PTE_PAGE;
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pteval |= ARM_SMMU_PTE_SH_IS;
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@ -27,7 +27,7 @@
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#define IOMMU_READ (1 << 0)
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#define IOMMU_WRITE (1 << 1)
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#define IOMMU_CACHE (1 << 2) /* DMA cache coherency */
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#define IOMMU_EXEC (1 << 3)
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#define IOMMU_NOEXEC (1 << 3)
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#define IOMMU_PRIV (1 << 4)
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#define IOMMU_DEVICE (1 << 5) /* Indicates access to device memory */
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