evie/android_kernel_oneplus_msm8998
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iommu/arm-smmu: change IOMMU_EXEC to IOMMU_NOEXEC

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Exposing the XN flag of the SMMU driver as IOMMU_NOEXEC instead of
IOMMU_EXEC makes it enforceable, since for IOMMUs that don't support
the XN flag pages will always be executable.

Change-Id: Ib785acd8a188fa95aea9991116139a392862764e
Signed-off-by: Antonios Motakis <a.motakis@virtualopensystems.com>
Acked-by: Joerg Roedel <jroedel@suse.de>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Git-commit: a720b41c41
[rvaswani@codeaurora.org: resolve trivial merge conflicts]
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
This commit is contained in:
Neeti Desai 2015-04-30 19:11:44 -07:00 • committed by David Keitel
parent cccb557b54
commit 86d54e985a
2 changed files with 6 additions and 5 deletions
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9
drivers/iommu/arm-smmu.c
View file

@ -1645,7 +1645,7 @@ static int arm_smmu_alloc_init_pte(struct arm_smmu_domain *smmu_domain,
unsigned long pfn, int prot, int stage) unsigned long pfn, int prot, int stage)
{ {
pte_t *pte, *start; pte_t *pte, *start;
pteval_t pteval = ARM_SMMU_PTE_PAGE | ARM_SMMU_PTE_AF | ARM_SMMU_PTE_XN; pteval_t pteval = ARM_SMMU_PTE_PAGE | ARM_SMMU_PTE_AF;
int ret; int ret;
if (pmd_none(*pmd)) { if (pmd_none(*pmd)) {
@ -1695,10 +1695,11 @@ static int arm_smmu_alloc_init_pte(struct arm_smmu_domain *smmu_domain,
pteval |= ARM_SMMU_PTE_MEMATTR_DEV; pteval |= ARM_SMMU_PTE_MEMATTR_DEV;
} }
if (prot & IOMMU_NOEXEC)
pteval |= ARM_SMMU_PTE_XN;
/* If no access, create a faulting entry to avoid TLB fills */ /* If no access, create a faulting entry to avoid TLB fills */
if (prot & IOMMU_EXEC) if (!(prot & (IOMMU_READ | IOMMU_WRITE)))
pteval &= ~ARM_SMMU_PTE_XN;
else if (!(prot & (IOMMU_READ | IOMMU_WRITE)))
pteval &= ~ARM_SMMU_PTE_PAGE; pteval &= ~ARM_SMMU_PTE_PAGE;
pteval |= ARM_SMMU_PTE_SH_IS; pteval |= ARM_SMMU_PTE_SH_IS;

2
include/linux/iommu.h
View file

@ -27,7 +27,7 @@
#define IOMMU_READ (1 << 0) #define IOMMU_READ (1 << 0)
#define IOMMU_WRITE (1 << 1) #define IOMMU_WRITE (1 << 1)
#define IOMMU_CACHE (1 << 2) /* DMA cache coherency */ #define IOMMU_CACHE (1 << 2) /* DMA cache coherency */
#define IOMMU_EXEC (1 << 3) #define IOMMU_NOEXEC (1 << 3)
#define IOMMU_PRIV (1 << 4) #define IOMMU_PRIV (1 << 4)
#define IOMMU_DEVICE (1 << 5) /* Indicates access to device memory */ #define IOMMU_DEVICE (1 << 5) /* Indicates access to device memory */