msm: pcie: update PCIe PHY clock scheme

Update the PCIe PHY clock scheme based on the
new settings.

Change-Id: I8c0049766e610bf5d7230fb1a8c531ba681db9c3
Signed-off-by: Tony Truong <truong@codeaurora.org>
This commit is contained in:
Tony Truong 2016-01-18 15:38:38 -08:00 committed by David Keitel
parent 5e06e809da
commit 99e08a1be6

View file

@ -1275,10 +1275,10 @@ static void pcie_phy_init(struct msm_pcie_dev_t *dev)
if (readl_relaxed(dev->tcsr) & (BIT(1) | BIT(0)))
msm_pcie_write_reg(dev->phy,
QSERDES_COM_SYSCLK_EN_SEL, 0x1A);
QSERDES_COM_SYSCLK_EN_SEL, 0x0A);
else
msm_pcie_write_reg(dev->phy,
QSERDES_COM_SYSCLK_EN_SEL, 0x14);
QSERDES_COM_SYSCLK_EN_SEL, 0x04);
}
msm_pcie_write_reg(dev->phy, QSERDES_COM_DEC_START_MODE0, 0x82);