ARM: dts: msm: Select CML clock with USB QMP PHY on msmcobalt

USB QMP PHY requires CML based refclock, otherwise USB QMP PHY
PLL may not lock. Hence select CML based refclock by programming
SYSCLK_EN_SEL register.

CRs-Fixed: 1001463
Change-Id: I4cc68a447d0cf3571a50b18d7eec5415430f9423
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
This commit is contained in:
Mayank Rana 2016-04-08 10:08:48 -07:00 committed by Jeevan Shriram
parent 37e734900a
commit 9c2a287cae

View file

@ -1302,6 +1302,7 @@
/* <reg_offset, value, delay> */
<0x138 0x30 0x00 /* Common block */
0x3c 0x06 0x00
0x80 0x14 0x00 /* SYSCLK_EN_SEL */
0x8c 0x08 0x00
0x15c 0x06 0x00
0x164 0x01 0x00