clk: qcom: Update the GPU PLL configuration to 800MHz
The GPU PLL initial configuration is modified to 800MHz and also update the RCG to be able to support force enable/disable for gfx3d_clk_src. Change-Id: I8e6d7dba762b678070d66e291347af2cdf804ae5 Signed-off-by: Taniya Das <tdas@codeaurora.org>
This commit is contained in:
parent
fb1e57936b
commit
aa66bb7cf8
2 changed files with 6 additions and 4 deletions
|
@ -935,6 +935,8 @@ static int clk_gfx3d_src_set_rate_and_parent(struct clk_hw *hw,
|
||||||
}
|
}
|
||||||
|
|
||||||
const struct clk_ops clk_gfx3d_src_ops = {
|
const struct clk_ops clk_gfx3d_src_ops = {
|
||||||
|
.enable = clk_rcg2_enable,
|
||||||
|
.disable = clk_rcg2_disable,
|
||||||
.is_enabled = clk_rcg2_is_enabled,
|
.is_enabled = clk_rcg2_is_enabled,
|
||||||
.get_parent = clk_rcg2_get_parent,
|
.get_parent = clk_rcg2_get_parent,
|
||||||
.set_parent = clk_rcg2_set_parent,
|
.set_parent = clk_rcg2_set_parent,
|
||||||
|
|
|
@ -84,12 +84,12 @@ static struct pll_vco gpu_vco[] = {
|
||||||
{ 250000000, 500000000, 3 },
|
{ 250000000, 500000000, 3 },
|
||||||
};
|
};
|
||||||
|
|
||||||
/* 640MHz configuration */
|
/* 800MHz configuration */
|
||||||
static const struct pll_config gpu_pll0_config = {
|
static const struct pll_config gpu_pll0_config = {
|
||||||
.l = 0x21,
|
.l = 0x29,
|
||||||
.config_ctl_val = 0x4001055b,
|
.config_ctl_val = 0x4001055b,
|
||||||
.alpha = 0x55555600,
|
.alpha = 0xaaaaab00,
|
||||||
.alpha_u = 0x55,
|
.alpha_u = 0xaa,
|
||||||
.alpha_en_mask = BIT(24),
|
.alpha_en_mask = BIT(24),
|
||||||
.vco_val = 0x2 << 20,
|
.vco_val = 0x2 << 20,
|
||||||
.vco_mask = 0x3 << 20,
|
.vco_mask = 0x3 << 20,
|
||||||
|
|
Loading…
Add table
Reference in a new issue