evie/android_kernel_oneplus_msm8998
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Merge "ARM: dts: msm: optimize rm67195 settings for SDM660 PM660A QRD"

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Linux Build Service Account 2017-04-08 09:12:33 -07:00 • committed by Gerrit - the friendly Code Review server
commit ae38441f86
3 changed files with 18 additions and 16 deletions
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10
arch/arm/boot/dts/qcom/dsi-panel-rm67195-amoled-fhd-cmd.dtsi
View file

@ -20,11 +20,11 @@
qcom,mdss-dsi-stream = <0>;
qcom,mdss-dsi-panel-width = <1080>;
qcom,mdss-dsi-panel-height = <1920>;
qcom,mdss-dsi-h-front-porch = <32>;
qcom,mdss-dsi-h-back-porch = <40>;
qcom,mdss-dsi-h-pulse-width = <8>;
qcom,mdss-dsi-h-front-porch = <120>;
qcom,mdss-dsi-h-back-porch = <60>;
qcom,mdss-dsi-h-pulse-width = <12>;
qcom,mdss-dsi-h-sync-skew = <0>;
qcom,mdss-dsi-v-back-porch = <16>;
qcom,mdss-dsi-v-back-porch = <12>;
qcom,mdss-dsi-v-front-porch = <8>;
qcom,mdss-dsi-v-pulse-width = <4>;
qcom,mdss-dsi-h-left-border = <0>;
@ -104,6 +104,8 @@
qcom,mdss-dsi-lane-1-state;
qcom,mdss-dsi-lane-2-state;
qcom,mdss-dsi-lane-3-state;
qcom,mdss-dsi-t-clk-post = <0x0d>;
qcom,mdss-dsi-t-clk-pre = <0x2f>;
qcom,mdss-dsi-wr-mem-start = <0x2c>;
qcom,mdss-dsi-wr-mem-continue = <0x3c>;
qcom,mdss-dsi-te-pin-select = <1>;

12
arch/arm/boot/dts/qcom/sdm630-mdss-panels.dtsi
View file

@ -152,11 +152,11 @@
};
&dsi_rm67195_amoled_fhd_cmd {
qcom,mdss-dsi-panel-timings-phy-v2 = [23 1e 07 08 05 03 04 a0
23 1e 07 08 05 03 04 a0
23 1e 07 08 05 03 04 a0
23 1e 07 08 05 03 04 a0
23 19 07 08 05 03 04 a0];
qcom,mdss-dsi-panel-timings-phy-v2 = [24 1f 08 09 05 03 04 a0
24 1f 08 09 05 03 04 a0
24 1f 08 09 05 03 04 a0
24 1f 08 09 05 03 04 a0
24 1a 08 09 05 03 04 a0];
qcom,mdss-dsi-t-clk-post = <0x0d>;
qcom,mdss-dsi-t-clk-pre = <0x2d>;
qcom,mdss-dsi-t-clk-pre = <0x2f>;
};

12
arch/arm/boot/dts/qcom/sdm660-mdss-panels.dtsi
View file

@ -267,11 +267,11 @@
};
&dsi_rm67195_amoled_fhd_cmd {
qcom,mdss-dsi-panel-timings-phy-v2 = [23 1e 07 08 05 03 04 a0
23 1e 07 08 05 03 04 a0
23 1e 07 08 05 03 04 a0
23 1e 07 08 05 03 04 a0
23 19 07 08 05 03 04 a0];
qcom,mdss-dsi-panel-timings-phy-v2 = [24 1f 08 09 05 03 04 a0
24 1f 08 09 05 03 04 a0
24 1f 08 09 05 03 04 a0
24 1f 08 09 05 03 04 a0
24 1a 08 09 05 03 04 a0];
qcom,mdss-dsi-t-clk-post = <0x0d>;
qcom,mdss-dsi-t-clk-pre = <0x2d>;
qcom,mdss-dsi-t-clk-pre = <0x2f>;
};