perf: Change PMCR write to read-modify-write

Preserves the bitfields of PMCR(AArch32)/PMCR_EL0(AArch64)
during PMU reset. Reset routine should write a 1 to PMCR.C and PMCR.P
fields only to reset the counters. Other fields should not be changed
as they could be set before PMU initialization and their value must
be preserved even after reset.

Change-Id: I835bf41f89a8a4691e996e6766aed4b4c8ef4368
Acked-by: Abhiroop Basak <abasak@qti.qualcomm.com>
Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org>
This commit is contained in:
Prasad Sodagudi 2015-11-19 15:19:46 +05:30 committed by David Keitel
parent cb8b39f631
commit b5bcae491a
2 changed files with 2 additions and 2 deletions

View file

@ -991,7 +991,7 @@ static void armv7pmu_reset(void *info)
}
/* Initialize & Reset PMNC: C and P bits */
armv7_pmnc_write(ARMV7_PMNC_P | ARMV7_PMNC_C);
armv7_pmnc_write(armv7_pmnc_read() | ARMV7_PMNC_P | ARMV7_PMNC_C);
}
static int armv7_a8_map_event(struct perf_event *event)

View file

@ -573,7 +573,7 @@ static void armv8pmu_reset(void *info)
}
/* Initialize & Reset PMNC: C and P bits. */
armv8pmu_pmcr_write(ARMV8_PMCR_P | ARMV8_PMCR_C);
armv8pmu_pmcr_write(armv8pmu_pmcr_read() | ARMV8_PMCR_P | ARMV8_PMCR_C);
/* Disable access from userspace. */
asm volatile("msr pmuserenr_el0, %0" :: "r" (0));