evie/android_kernel_oneplus_msm8998
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Merge "msm: pcie: verify EP is accessible before conf restore"

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Linux Build Service Account 2016-09-29 11:21:10 -07:00 • committed by Gerrit - the friendly Code Review server
commit bc716d0f35
1 changed files with 12 additions and 6 deletions
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18
drivers/pci/host/pci-msm.c
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@ -1760,7 +1760,8 @@ static inline int msm_pcie_check_align(struct msm_pcie_dev_t *dev,
static bool msm_pcie_confirm_linkup(struct msm_pcie_dev_t *dev, static bool msm_pcie_confirm_linkup(struct msm_pcie_dev_t *dev,
bool check_sw_stts, bool check_sw_stts,
bool check_ep) bool check_ep,
void __iomem *ep_conf)
{ {
u32 val; u32 val;
@ -1787,7 +1788,7 @@ static bool msm_pcie_confirm_linkup(struct msm_pcie_dev_t *dev,
} }
if (check_ep) { if (check_ep) {
val = readl_relaxed(dev->conf); val = readl_relaxed(ep_conf);
PCIE_DBG(dev, PCIE_DBG(dev,
"PCIe: device ID and vender ID of EP of RC %d are 0x%x.\n", "PCIe: device ID and vender ID of EP of RC %d are 0x%x.\n",
dev->rc_idx, val); dev->rc_idx, val);
@ -1816,6 +1817,10 @@ static void msm_pcie_cfg_recover(struct msm_pcie_dev_t *dev, bool rc)
cfg = dev->dm_core; cfg = dev->dm_core;
shadow = dev->rc_shadow; shadow = dev->rc_shadow;
} else { } else {
if (!msm_pcie_confirm_linkup(dev, false, true,
dev->pcidev_table[i].conf_base))
continue;
shadow = dev->ep_shadow[i]; shadow = dev->ep_shadow[i];
PCIE_DBG(dev, PCIE_DBG(dev,
"PCIe Device: %02x:%02x.%01x\n", "PCIe Device: %02x:%02x.%01x\n",
@ -4566,11 +4571,11 @@ int msm_pcie_enable(struct msm_pcie_dev_t *dev, u32 options)
usleep_range(LINK_UP_TIMEOUT_US_MIN, LINK_UP_TIMEOUT_US_MAX); usleep_range(LINK_UP_TIMEOUT_US_MIN, LINK_UP_TIMEOUT_US_MAX);
val = readl_relaxed(dev->elbi + PCIE20_ELBI_SYS_STTS); val = readl_relaxed(dev->elbi + PCIE20_ELBI_SYS_STTS);
} while ((!(val & XMLH_LINK_UP) || } while ((!(val & XMLH_LINK_UP) ||
!msm_pcie_confirm_linkup(dev, false, false)) !msm_pcie_confirm_linkup(dev, false, false, NULL))
&& (link_check_count++ < LINK_UP_CHECK_MAX_COUNT)); && (link_check_count++ < LINK_UP_CHECK_MAX_COUNT));
if ((val & XMLH_LINK_UP) && if ((val & XMLH_LINK_UP) &&
msm_pcie_confirm_linkup(dev, false, false)) { msm_pcie_confirm_linkup(dev, false, false, NULL)) {
PCIE_DBG(dev, "Link is up after %d checkings\n", PCIE_DBG(dev, "Link is up after %d checkings\n",
link_check_count); link_check_count);
PCIE_INFO(dev, "PCIe RC%d link initialized\n", dev->rc_idx); PCIE_INFO(dev, "PCIe RC%d link initialized\n", dev->rc_idx);
@ -6484,7 +6489,8 @@ static int msm_pcie_pm_suspend(struct pci_dev *dev,
} }
if (dev && !(options & MSM_PCIE_CONFIG_NO_CFG_RESTORE) if (dev && !(options & MSM_PCIE_CONFIG_NO_CFG_RESTORE)
&& msm_pcie_confirm_linkup(pcie_dev, true, true)) { && msm_pcie_confirm_linkup(pcie_dev, true, true,
pcie_dev->conf)) {
ret = pci_save_state(dev); ret = pci_save_state(dev);
pcie_dev->saved_state = pci_store_saved_state(dev); pcie_dev->saved_state = pci_store_saved_state(dev);
} }
@ -6993,7 +6999,7 @@ int msm_pcie_recover_config(struct pci_dev *dev)
return -ENODEV; return -ENODEV;
} }
if (msm_pcie_confirm_linkup(pcie_dev, true, true)) { if (msm_pcie_confirm_linkup(pcie_dev, true, true, pcie_dev->conf)) {
PCIE_DBG(pcie_dev, PCIE_DBG(pcie_dev,
"Recover config space of RC%d and its EP\n", "Recover config space of RC%d and its EP\n",
pcie_dev->rc_idx); pcie_dev->rc_idx);