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clk: qcom: Enable safe configuration for ahb clock source

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To avoid running into issues with the MMNOC RCG being enabled due
to an enable request from a secure world entity whilst the HLOS code
has disabled its parents, park the RCG at CXO when its disabled.

Change-Id: I98e2efaed01ee4e92a457c56f2e276985882dbbb
Signed-off-by: Taniya Das <tdas@codeaurora.org>
This commit is contained in:
Taniya Das 2017-02-20 17:19:51 +05:30 • committed by Gerrit - the friendly Code Review server
parent 75e9ce044f
commit bea7e76093
1 changed files with 1 additions and 1 deletions
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2
drivers/clk/qcom/mmcc-sdm660.c
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@ -529,7 +529,7 @@ static struct clk_rcg2 ahb_clk_src = {
.hid_width = 5, .hid_width = 5,
.parent_map = mmcc_parent_map_10, .parent_map = mmcc_parent_map_10,
.freq_tbl = ftbl_ahb_clk_src, .freq_tbl = ftbl_ahb_clk_src,
.flags = FORCE_ENABLE_RCGR, .enable_safe_config = true,
.clkr.hw.init = &(struct clk_init_data){ .clkr.hw.init = &(struct clk_init_data){
.name = "ahb_clk_src", .name = "ahb_clk_src",
.parent_names = mmcc_parent_names_10, .parent_names = mmcc_parent_names_10,