Merge "ARM: dts: msm: enable qcom,no-smr-check for mmss smmu for msmcobalt"
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commit
c50c09ee13
3 changed files with 8 additions and 5 deletions
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@ -113,6 +113,7 @@
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reg = <0xcd00000 0x40000>;
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reg = <0xcd00000 0x40000>;
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#iommu-cells = <1>;
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#iommu-cells = <1>;
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qcom,register-save;
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qcom,register-save;
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qcom,no-smr-check;
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qcom,skip-init;
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qcom,skip-init;
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#global-interrupts = <2>;
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#global-interrupts = <2>;
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interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>,
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interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>,
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@ -2776,6 +2776,8 @@
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&gdsc_bimc_smmu {
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&gdsc_bimc_smmu {
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clock-names = "bus_clk";
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clock-names = "bus_clk";
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clocks = <&clock_mmss clk_mmss_bimc_smmu_axi_clk>;
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clocks = <&clock_mmss clk_mmss_bimc_smmu_axi_clk>;
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proxy-supply = <&gdsc_bimc_smmu>;
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qcom,proxy-consumer-enable;
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status = "ok";
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status = "ok";
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};
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};
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@ -509,7 +509,7 @@ static unsigned long dsi_pll_get_vco_rate(struct clk *c)
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16);
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16);
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/* OUTDIV_1:0 field is (log(outdiv, 2)) */
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/* OUTDIV_1:0 field is (log(outdiv, 2)) */
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outdiv = MDSS_PLL_REG_R(pll->pll_base, PLL_OUTDIV);
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outdiv = MDSS_PLL_REG_R(pll->pll_base, PLL_PLL_OUTDIV_RATE);
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outdiv &= 0x3;
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outdiv &= 0x3;
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outdiv = 1 << outdiv;
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outdiv = 1 << outdiv;
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@ -521,12 +521,12 @@ static unsigned long dsi_pll_get_vco_rate(struct clk *c)
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multiplier = 1 << 18;
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multiplier = 1 << 18;
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pll_freq = dec * (ref_clk * 2);
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pll_freq = dec * (ref_clk * 2);
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tmp64 = (ref_clk * 2 * frac);
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tmp64 = (ref_clk * 2 * frac);
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pll_freq += do_div(tmp64, multiplier);
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pll_freq += div_u64(tmp64, multiplier);
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vco_rate = do_div(pll_freq, outdiv);
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vco_rate = div_u64(pll_freq, outdiv);
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pr_debug("dec=0x%x\n, frac=0x%x, outdiv=%d, vco=%lu\n",
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pr_debug("dec=0x%x, frac=0x%x, outdiv=%d, vco=%llu\n",
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dec, frac, outdiv, (unsigned long)vco_rate);
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dec, frac, outdiv, vco_rate);
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(void)mdss_pll_resource_enable(pll, false);
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(void)mdss_pll_resource_enable(pll, false);
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