ARM: dts: msm: add mdss device tree for msmcobalt
Change adds mdss device tree for msmcobalt which provides mdss HW offsets for this chipset. CRs-fixed: 1000739 Change-Id: Ibb12e0179a66e89ca675f4ae35fc2f77c050da2c Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org> Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
This commit is contained in:
Abhijit Kulkarni
Jeevan Shriram
parent
a402fc692c
commit
c6d31e7176
2 changed files with 216 additions and 0 deletions
215
arch/arm/boot/dts/qcom/msmcobalt-mdss.dtsi
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215
arch/arm/boot/dts/qcom/msmcobalt-mdss.dtsi
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/* Copyright (c) 2016, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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&soc {
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mdss_mdp: qcom,mdss_mdp@c900000 {
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compatible = "qcom,mdss_mdp";
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reg = <0x0c900000 0x90000>,
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<0x0c9b0000 0x1040>;
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reg-names = "mdp_phys", "vbif_phys";
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interrupts = <0 83 0>;
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vdd-supply = <&gdsc_mdss>;
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/* Bus Scale Settings */
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qcom,msm-bus,name = "mdss_mdp";
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qcom,msm-bus,num-cases = <3>;
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qcom,msm-bus,num-paths = <2>;
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qcom,msm-bus,vectors-KBps =
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<22 512 0 0>, <23 512 0 0>,
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<22 512 0 6400000>, <23 512 0 6400000>,
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<22 512 0 6400000>, <23 512 0 6400000>;
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/* Fudge factors */
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qcom,mdss-ab-factor = <1 1>; /* 1 time */
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qcom,mdss-ib-factor = <1 1>; /* 1 time */
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qcom,mdss-clk-factor = <105 100>; /* 1.05 times */
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qcom,max-mixer-width = <2560>;
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qcom,max-pipe-width = <2560>;
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/* VBIF QoS remapper settings*/
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qcom,mdss-vbif-qos-rt-setting = <1 2 2 2>;
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qcom,mdss-has-panic-ctrl;
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qcom,mdss-per-pipe-panic-luts = <0x000f>,
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<0xffff>,
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<0xfffc>,
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<0xff00>;
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qcom,mdss-mdp-reg-offset = <0x00001000>;
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qcom,max-bandwidth-low-kbps = <9600000>;
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qcom,max-bandwidth-high-kbps = <9600000>;
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qcom,max-bandwidth-per-pipe-kbps = <4500000>;
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qcom,max-clk-rate = <412500000>;
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qcom,mdss-default-ot-rd-limit = <32>;
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qcom,mdss-default-ot-wr-limit = <16>;
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qcom,mdss-dram-channels = <2>;
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qcom,mdss-pipe-vig-off = <0x00005000 0x00007000
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0x00009000 0x0000b000>;
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qcom,mdss-pipe-dma-off = <0x00025000 0x00027000>;
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qcom,mdss-pipe-cursor-off = <0x00035000 0x00037000>;
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qcom,mdss-pipe-vig-xin-id = <0 4 8 12>;
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qcom,mdss-pipe-dma-xin-id = <1 5>;
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qcom,mdss-pipe-cursor-xin-id = <2 10>;
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/* These Offsets are relative to
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* "mdp_phys + mdp-reg-offset" address
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*/
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qcom,mdss-pipe-vig-clk-ctrl-offsets = <0x2ac 0 0>,
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<0x2b4 0 0>,
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<0x2bc 0 0>,
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<0x2c4 0 0>;
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qcom,mdss-pipe-dma-clk-ctrl-offsets = <0x2ac 8 12>,
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<0x2b4 8 12>;
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qcom,mdss-pipe-cursor-clk-ctrl-offsets = <0x3a8 16 15>,
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<0x3b0 16 15>;
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qcom,mdss-ctl-off = <0x00002000 0x00002200 0x00002400
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0x00002600 0x00002800>;
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qcom,mdss-mixer-intf-off = <0x00045000 0x00046000
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0x00047000 0x0004a000>;
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qcom,mdss-dspp-off = <0x00055000 0x00057000>;
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qcom,mdss-wb-off = <0x00066000>;
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qcom,mdss-intf-off = <0x0006b000 0x0006b800
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0x0006c000 0x0006c800>;
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qcom,mdss-pingpong-off = <0x00071000 0x00071800
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0x00072000 0x00072800>;
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qcom,mdss-slave-pingpong-off = <0x00073000>;
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qcom,mdss-ppb-off = <0x00000330 0x00000338>;
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qcom,mdss-has-pingpong-split;
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qcom,mdss-has-separate-rotator;
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qcom,mdss-ad-off = <0x0079000 0x00079800 0x0007a000>;
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qcom,mdss-cdm-off = <0x0007a200>;
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qcom,mdss-dsc-off = <0x00081000 0x00081400>;
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qcom,mdss-wfd-mode = "intf";
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qcom,mdss-has-source-split;
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qcom,mdss-highest-bank-bit = <0x2>;
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qcom,mdss-has-decimation;
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qcom,mdss-idle-power-collapse-enabled;
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clocks = <&clock_mmss clk_mmss_mdss_ahb_clk>,
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<&clock_mmss clk_mmss_mdss_axi_clk>,
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<&clock_mmss clk_mdp_clk_src>,
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<&clock_mmss clk_mmss_mdss_vsync_clk>;
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clock-names = "iface_clk", "bus_clk", "core_clk_src",
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"core_clk", "vsync_clk";
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qcom,regs-dump-mdp = <0x01000 0x01454>,
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<0x02000 0x02064>,
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<0x02200 0x02264>,
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<0x02400 0x02464>,
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<0x02600 0x02664>,
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<0x02800 0x02864>,
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<0x05000 0x05150>,
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<0x05200 0x05230>,
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<0x07000 0x07150>,
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<0x07200 0x07230>,
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<0x09000 0x09150>,
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<0x09200 0x09230>,
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<0x0b000 0x0b150>,
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<0x0b200 0x0b230>,
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<0x25000 0x25150>,
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<0x27000 0x27150>,
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<0x35000 0x35150>,
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<0x37000 0x37150>,
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<0x45000 0x452bc>,
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<0x46000 0x462bc>,
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<0x47000 0x472bc>,
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<0x48000 0x482bc>,
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<0x49000 0x492bc>,
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<0x4a000 0x4a2bc>,
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<0x55000 0x5522c>,
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<0x57000 0x5722c>,
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<0x66000 0x662c0>,
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<0x6b000 0x6b268>,
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<0x6b800 0x6ba68>,
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<0x6c000 0x6c268>,
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<0x6c800 0x6ca68>,
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<0x71000 0x710d4>,
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<0x71800 0x718d4>,
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<0x73000 0x730d4>,
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<0x81000 0x81140>,
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<0x81400 0x81540>;
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qcom,regs-dump-names-mdp = "MDP",
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"CTL_0", "CTL_1", "CTL_2", "CTL_3", "CTL_4",
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"VIG0_SSPP", "VIG0", "VIG1_SSPP", "VIG1",
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"VIG2_SSPP", "VIG2", "VIG3_SSPP", "VIG3",
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"DMA0_SSPP", "DMA1_SSPP",
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"CURSOR0_SSPP", "CURSOR1_SSPP",
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"LAYER_0", "LAYER_1", "LAYER_2",
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"LAYER_3", "LAYER_4", "LAYER_5",
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"DSPP_0", "DSPP_1",
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"WB_2",
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"INTF_0", "INTF_1", "INTF_2", "INTF_3",
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"PP_0", "PP_1", "PP_4",
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"DSC_0", "DSC_1";
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/* buffer parameters to calculate prefill bandwidth */
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qcom,mdss-prefill-outstanding-buffer-bytes = <0>;
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qcom,mdss-prefill-y-buffer-bytes = <0>;
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qcom,mdss-prefill-scaler-buffer-lines-bilinear = <2>;
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qcom,mdss-prefill-scaler-buffer-lines-caf = <4>;
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qcom,mdss-prefill-post-scaler-buffer-pixels = <2560>;
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qcom,mdss-prefill-pingpong-buffer-pixels = <5120>;
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qcom,mdss-pp-offsets {
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qcom,mdss-sspp-mdss-igc-lut-off = <0x2000>;
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qcom,mdss-sspp-vig-pcc-off = <0x1780>;
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qcom,mdss-sspp-rgb-pcc-off = <0x380>;
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qcom,mdss-sspp-dma-pcc-off = <0x380>;
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qcom,mdss-lm-pgc-off = <0x3c0>;
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qcom,mdss-dspp-gamut-off = <0x1600>;
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qcom,mdss-dspp-pcc-off = <0x1700>;
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qcom,mdss-dspp-pgc-off = <0x17c0>;
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};
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smmu_mdp_unsec: qcom,smmu_mdp_unsec_cb {
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compatible = "qcom,smmu_mdp_unsec";
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iommus = <&mmss_smmu 0>;
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gdsc-mmagic-mdss-supply = <&gdsc_bimc_smmu>;
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clocks = <&clock_mmss clk_mmss_bimc_smmu_ahb_clk>,
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<&clock_mmss clk_mmss_bimc_smmu_axi_clk>;
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clock-names = "mmss_smmu_ahb_clk", "mmss_smmu_axi_clk";
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};
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smmu_mdp_sec: qcom,smmu_mdp_sec_cb {
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compatible = "qcom,smmu_mdp_sec";
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iommus = <&mmss_smmu 1>;
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gdsc-mmagic-mdss-supply = <&gdsc_bimc_smmu>;
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clocks = <&clock_mmss clk_mmss_bimc_smmu_ahb_clk>,
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<&clock_mmss clk_mmss_bimc_smmu_axi_clk>;
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clock-names = "mmss_smmu_ahb_clk", "mmss_smmu_axi_clk";
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};
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mdss_fb0: qcom,mdss_fb_primary {
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cell-index = <0>;
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compatible = "qcom,mdss-fb";
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};
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mdss_fb1: qcom,mdss_fb_wfd {
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cell-index = <1>;
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compatible = "qcom,mdss-fb";
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};
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};
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qcom,mdss_wb_panel {
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compatible = "qcom,mdss_wb";
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qcom,mdss_pan_res = <640 480>;
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qcom,mdss_pan_bpp = <24>;
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qcom,mdss-fb-map = <&mdss_fb1>;
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};
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};
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@ -2224,3 +2224,4 @@
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#include "msmcobalt-pinctrl.dtsi"
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#include "msm-audio-lpass.dtsi"
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#include "msmcobalt-audio.dtsi"
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#include "msmcobalt-mdss.dtsi"
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