ARM: dts: qcom: Update the uart clock to upstream clock
Update the compatible string and clock name to upstream. Change-Id: I693dd6df9e272a09748d74d7ed9d76fe294ec7ee Signed-off-by: Runmin Wang <runminw@codeaurora.org>
This commit is contained in:
parent
2a69c38265
commit
cb73786a28
1 changed files with 4 additions and 4 deletions
|
@ -296,23 +296,23 @@
|
|||
};
|
||||
|
||||
uartblsp1dm1: serial@0c170000 {
|
||||
compatible = "qcom,msm-lsuart-v14", "qcom,msm-uartdm";
|
||||
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
|
||||
reg = <0xc170000 0x1000>;
|
||||
interrupts = <0 108 0>;
|
||||
status = "disabled";
|
||||
clocks = <&clock_gcc clk_gcc_blsp1_uart2_apps_clk>,
|
||||
<&clock_gcc clk_gcc_blsp1_ahb_clk>;
|
||||
clock-names = "core_clk", "iface_clk";
|
||||
clock-names = "core", "iface";
|
||||
};
|
||||
|
||||
uartblsp2dm1: serial@0c1b0000 {
|
||||
compatible = "qcom,msm-lsuart-v14", "qcom,msm-uartdm";
|
||||
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
|
||||
reg = <0xc1b0000 0x1000>;
|
||||
interrupts = <0 114 0>;
|
||||
status = "disabled";
|
||||
clocks = <&clock_gcc clk_gcc_blsp2_uart2_apps_clk>,
|
||||
<&clock_gcc clk_gcc_blsp2_ahb_clk>;
|
||||
clock-names = "core_clk", "iface_clk";
|
||||
clock-names = "core", "iface";
|
||||
};
|
||||
|
||||
timer@17920000 {
|
||||
|
|
Loading…
Add table
Reference in a new issue