ARM: dts: msm: Configure irq flag for blsp_uart2 in 8996 gvm

Configure irq flag as level high for blsp_uart2 wake-up
interrupt in msm8996 gvm.

Change-Id: I028ea5ea36da2a97c6878b763fcde1ebbbed9847
Signed-off-by: Vivek Kumar <vivekuma@codeaurora.org>
This commit is contained in:
Vivek Kumar 2018-05-03 14:02:43 +05:30 committed by Gerrit - the friendly Code Review server
parent 445cee88de
commit cb84e2692b

View file

@ -10,6 +10,8 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <dt-bindings/interrupt-controller/irq.h>
/ {
aliases {
spi9 = &spi_9;
@ -94,7 +96,7 @@
<0x7544000 0x2b000>;
reg-names = "core_mem", "bam_mem";
interrupt-names = "core_irq", "bam_irq", "wakeup_irq";
interrupts = <0 108 0>, <0 238 0>, <0 810 0>;
interrupts = <0 108 0>, <0 238 0>, <0 810 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <0>;
qcom,inject-rx-on-wakeup;