Merge "clk: qcom: Add support for clk_set_flags for branch and dummy clock"
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commit
cbbeefbea9
4 changed files with 113 additions and 4 deletions
Documentation/devicetree/bindings/arm/msm
drivers/clk/qcom
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@ -9,9 +9,14 @@ Required properties:
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- #clock_cells: Must be <1>. This will allow the common clock device
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tree framework to recognize _this_ device node as a
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clock provider.
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Optional properties:
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- #reset-cells: Must be <1>. This will allow the common reset device
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tree framework to recognize _this_ device node as a
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reset controller provider.
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Example:
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clock_rpm: qcom,rpmcc {
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compatible = "qcom,dummycc";
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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@ -125,15 +125,62 @@ static int clk_branch_enable(struct clk_hw *hw)
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return clk_branch_toggle(hw, true, clk_branch_check_halt);
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}
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static int clk_cbcr_set_flags(struct regmap *regmap, unsigned int reg,
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unsigned long flags)
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{
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u32 cbcr_val;
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regmap_read(regmap, reg, &cbcr_val);
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switch (flags) {
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case CLKFLAG_PERIPH_OFF_SET:
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cbcr_val |= BIT(12);
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break;
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case CLKFLAG_PERIPH_OFF_CLEAR:
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cbcr_val &= ~BIT(12);
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break;
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case CLKFLAG_RETAIN_PERIPH:
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cbcr_val |= BIT(13);
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break;
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case CLKFLAG_NORETAIN_PERIPH:
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cbcr_val &= ~BIT(13);
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break;
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case CLKFLAG_RETAIN_MEM:
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cbcr_val |= BIT(14);
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break;
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case CLKFLAG_NORETAIN_MEM:
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cbcr_val &= ~BIT(14);
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break;
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default:
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return -EINVAL;
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}
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regmap_write(regmap, reg, cbcr_val);
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/* Make sure power is enabled/disabled before returning. */
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mb();
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udelay(1);
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return 0;
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}
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static void clk_branch_disable(struct clk_hw *hw)
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{
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clk_branch_toggle(hw, false, clk_branch_check_halt);
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}
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static int clk_branch_set_flags(struct clk_hw *hw, unsigned flags)
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{
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struct clk_branch *br = to_clk_branch(hw);
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return clk_cbcr_set_flags(br->clkr.regmap, br->halt_reg, flags);
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}
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const struct clk_ops clk_branch_ops = {
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.enable = clk_branch_enable,
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.disable = clk_branch_disable,
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.is_enabled = clk_is_enabled_regmap,
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.set_flags = clk_branch_set_flags,
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};
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EXPORT_SYMBOL_GPL(clk_branch_ops);
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@ -151,6 +198,7 @@ const struct clk_ops clk_branch2_ops = {
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.enable = clk_branch2_enable,
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.disable = clk_branch2_disable,
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.is_enabled = clk_is_enabled_regmap,
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.set_flags = clk_branch_set_flags,
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};
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EXPORT_SYMBOL_GPL(clk_branch2_ops);
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@ -73,4 +73,13 @@ extern const struct clk_ops clk_branch_simple_ops;
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#define to_clk_gate2(_hw) \
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container_of(to_clk_regmap(_hw), struct clk_gate2, clkr)
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enum branch_mem_flags {
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CLKFLAG_RETAIN_PERIPH,
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CLKFLAG_NORETAIN_PERIPH,
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CLKFLAG_RETAIN_MEM,
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CLKFLAG_NORETAIN_MEM,
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CLKFLAG_PERIPH_OFF_SET,
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CLKFLAG_PERIPH_OFF_CLEAR,
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};
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#endif
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@ -15,14 +15,18 @@
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/reset-controller.h>
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struct clk_dummy {
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struct clk_hw hw;
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struct reset_controller_dev reset;
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unsigned long rrate;
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};
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#define to_clk_dummy(_hw) container_of(_hw, struct clk_dummy, hw)
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#define RESET_MAX 100
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static int dummy_clk_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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@ -51,22 +55,48 @@ static unsigned long dummy_clk_recalc_rate(struct clk_hw *hw,
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return dummy->rrate;
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}
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static int dummy_clk_set_flags(struct clk_hw *hw, unsigned flags)
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{
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return 0;
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}
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struct clk_ops clk_dummy_ops = {
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.set_rate = dummy_clk_set_rate,
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.round_rate = dummy_clk_round_rate,
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.recalc_rate = dummy_clk_recalc_rate,
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.set_flags = dummy_clk_set_flags,
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};
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EXPORT_SYMBOL_GPL(clk_dummy_ops);
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static int dummy_reset_assert(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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pr_debug("%s\n", __func__);
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return 0;
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}
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static int dummy_reset_deassert(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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pr_debug("%s\n", __func__);
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return 0;
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}
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static struct reset_control_ops dummy_reset_ops = {
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.assert = dummy_reset_assert,
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.deassert = dummy_reset_deassert,
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};
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/**
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* clk_register_dummy - register dummy clock with the
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* clock framework
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* @dev: device that is registering this clock
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* @name: name of this clock
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* @flags: framework-specific flags
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* @node: device node
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*/
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static struct clk *clk_register_dummy(struct device *dev, const char *name,
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unsigned long flags)
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unsigned long flags, struct device_node *node)
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{
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struct clk_dummy *dummy;
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struct clk *clk;
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@ -85,8 +115,20 @@ static struct clk *clk_register_dummy(struct device *dev, const char *name,
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/* register the clock */
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clk = clk_register(dev, &dummy->hw);
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if (IS_ERR(clk))
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if (IS_ERR(clk)) {
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kfree(dummy);
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return clk;
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}
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dummy->reset.of_node = node;
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dummy->reset.ops = &dummy_reset_ops;
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dummy->reset.nr_resets = RESET_MAX;
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if (reset_controller_register(&dummy->reset))
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pr_err("Failed to register reset controller for %s\n", name);
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else
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pr_info("Successfully registered a dummy reset controller for %s\n",
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name);
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return clk;
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}
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@ -101,10 +143,15 @@ static void of_dummy_clk_setup(struct device_node *node)
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of_property_read_string(node, "clock-output-names", &clk_name);
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clk = clk_register_dummy(NULL, clk_name, 0);
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clk = clk_register_dummy(NULL, clk_name, 0, node);
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if (!IS_ERR(clk))
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of_clk_add_provider(node, of_clk_src_simple_get, clk);
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else {
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pr_err("Failed to register dummy clock controller for %s\n",
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clk_name);
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return;
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}
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pr_info("%s: Dummy clock registered\n", clk_name);
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pr_info("Successfully registered dummy clock for %s\n", clk_name);
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}
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CLK_OF_DECLARE(dummy_clk, "qcom,dummycc", of_dummy_clk_setup);
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