mmc: core: set REL_WR_SEC_C register to 0x1 per eMMC5.0 spec

Some eMMC vendors violate eMMC 5.0 spec and set REL_WR_SEC_C
register to 0x10 to indicate the ability of RPMB throughput
improvement thus lead to failure when TZ module write data to
RPMB partition. This change will check bit[4] of EXT_CSD[166]
and if it is not set then change value of REL_WR_SEC_C to 0x1
directly ignoring value of EXT_CSD[222].

CRs-Fixed: 866059
Change-Id: Ibd12c94ad691eca1fa3ea2049b750a6e98178678
Signed-off-by: xiaonian <xiaonian@codeaurora.org>
Signed-off-by: Pavan Anamula <pavana@codeaurora.org>
This commit is contained in:
xiaonian 2015-07-16 14:39:32 +08:00 committed by Subhash Jadavani
parent 34167033d4
commit d6a8e003e0

View file

@ -563,6 +563,19 @@ static int mmc_decode_ext_csd(struct mmc_card *card, u8 *ext_csd)
card->ext_csd.rel_param = ext_csd[EXT_CSD_WR_REL_PARAM];
card->ext_csd.rst_n_function = ext_csd[EXT_CSD_RST_N_FUNCTION];
/*
* Some eMMC vendors violate eMMC 5.0 spec and set
* REL_WR_SEC_C register to 0x10 to indicate the
* ability of RPMB throughput improvement thus lead
* to failure when TZ module write data to RPMB
* partition. So check bit[4] of EXT_CSD[166] and
* if it is not set then change value of REL_WR_SEC_C
* to 0x1 directly ignoring value of EXT_CSD[222].
*/
if (!(card->ext_csd.rel_param &
EXT_CSD_WR_REL_PARAM_EN_RPMB_REL_WR))
card->ext_csd.rel_sectors = 0x1;
/*
* RPMB regions are defined in multiples of 128K.
*/