evie/android_kernel_oneplus_msm8998
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clk: mdss: remove configuring phy registers during pll disable

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DSI driver needs to disable pll and enable clamps before entering into
low power state. Since the PLL disable is configuring GLBL_TEST_CNTRL,
CLK_BUF PHY registers to 0, these registers are not restored after the
clamps are disabled.  This change avoids configuring these registers
during PLL disable and gets disabled during dsi off.

Change-Id: Ia577099679f23cb9d0d42417863b6b3ad3af635b
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
This commit is contained in:
Jeevan Shriram 2015-06-03 10:04:17 -07:00 • committed by David Keitel
parent 19ccabc6b7
commit dce26f3485
3 changed files with 9 additions and 23 deletions
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16
drivers/clk/msm/mdss/mdss-dsi-pll-8996-util.c
View file

@ -295,22 +295,6 @@ static void dsi_pll_disable(struct clk *c)
dsi_pll_stop_8996(pll->pll_base);
/* stop pll output */
MDSS_PLL_REG_W(pll->pll_base, DSIPHY_PLL_CLKBUFLR_EN, 0);
/* stop clk */
MDSS_PLL_REG_W(pll->pll_base, DSIPHY_CMN_GLBL_TEST_CTRL, 0);
/* stop digital block */
MDSS_PLL_REG_W(pll->pll_base, DSIPHY_CMN_CTRL_0, 0x0);
if (slave) {
/* stop pll output */
MDSS_PLL_REG_W(pll->pll_base, DSIPHY_PLL_CLKBUFLR_EN, 0);
/* stop clk */
MDSS_PLL_REG_W(pll->pll_base, DSIPHY_CMN_GLBL_TEST_CTRL, 0);
/* stop digital block */
MDSS_PLL_REG_W(pll->pll_base, DSIPHY_CMN_CTRL_0, 0x0);
}
mdss_pll_resource_enable(pll, false);
pll->pll_on = false;

6
drivers/video/fbdev/msm/mdss_dsi.c
View file

@ -1040,8 +1040,9 @@ static int mdss_dsi_off(struct mdss_panel_data *pdata, int power_state)
goto panel_power_ctrl;
}
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_LINK_CLKS, 0);
if (pdata->panel_info.type == MIPI_CMD_PANEL)
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 1);
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_CORE_CLKS, 1);
if (!pdata->panel_info.ulps_suspend_enabled) {
/* disable DSI controller */
@ -1050,8 +1051,7 @@ static int mdss_dsi_off(struct mdss_panel_data *pdata, int power_state)
/* disable DSI phy */
mdss_dsi_phy_disable(ctrl_pdata);
}
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 0);
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_CORE_CLKS, 0);
panel_power_ctrl:
ret = mdss_dsi_panel_power_ctrl(pdata, power_state);

10
drivers/video/fbdev/msm/msm_mdss_io_8974.c
View file

@ -133,11 +133,13 @@ static void mdss_dsi_phy_shutdown(struct mdss_dsi_ctrl_pdata *ctrl)
}
if (IS_MDSS_MAJOR_MINOR_SAME(ctrl->shared_data->hw_rev,
MDSS_DSI_HW_REV_104))
MIPI_OUTP(ctrl->phy_io.base + DSIPHY_CMN_CTRL_0, ~0x1F);
else
MDSS_DSI_HW_REV_104)) {
MIPI_OUTP(ctrl->phy_io.base + DSIPHY_PLL_CLKBUFLR_EN, 0);
MIPI_OUTP(ctrl->phy_io.base + DSIPHY_CMN_GLBL_TEST_CTRL, 0);
MIPI_OUTP(ctrl->phy_io.base + DSIPHY_CMN_CTRL_0, 0);
} else {
MIPI_OUTP(ctrl->phy_io.base + MDSS_DSI_DSIPHY_CTRL_0, 0x000);
}
}
/**