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iommu/arm-smmu: correct the physical address mask during ATOS

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We're currently taking the upper 52 bits from the CB_PAR register and
using them for the output physical address.  That doesn't make sense for
a few reasons, not the least of which is the fact that physical
addresses are only 48 bits on ARM64 and even less on ARM32.  Also, when
using V7L and V8 descriptor formats the top byte of the CB_PAR register
contains the memory attributes for the translation.  Fix this by masking
out everything above the valid physical address bits with PHYS_MASK.

Change-Id: I96096a6515dc42025d3134933a90b072e5153968
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
This commit is contained in:
Mitchel Humpherys 2014-10-29 12:45:21 -07:00 • committed by David Keitel
parent 30155bb55e
commit e4348b5975
1 changed files with 1 additions and 1 deletions
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2
drivers/iommu/arm-smmu.c
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@ -1858,7 +1858,7 @@ static phys_addr_t arm_smmu_iova_to_phys_hard(struct iommu_domain *domain,
dev_err(dev, "PAR = 0x%llx\n", phys); dev_err(dev, "PAR = 0x%llx\n", phys);
phys = 0; phys = 0;
} else { } else {
phys = (phys & 0xfffffff000ULL) | (iova & 0x00000fff); phys = (phys & (PHYS_MASK & ~0xfffULL)) | (iova & 0xfff);
} }
arm_smmu_disable_clocks(smmu); arm_smmu_disable_clocks(smmu);