ARM: dts: msm: Add pinctrl for codec reset and interrupt on 8996

Change reset and interrupt lines of codec from gpio to pinctrl
on 8996 target to control the drive strength of the pins.

Change-Id: Ie95b80699f1726c2b2e27c1b8e5f51f7ccdd5417
Signed-off-by: Sudheer Papothi <spapothi@codeaurora.org>
This commit is contained in:
Sudheer Papothi 2015-06-08 22:50:08 +05:30 committed by David Keitel
parent 6abda44581
commit ec61fa0e6f
2 changed files with 48 additions and 0 deletions

View file

@ -1283,6 +1283,49 @@
};
};
wcd9xxx_intr {
wcd_intr_default: wcd_intr_default{
mux {
pins = "gpio54";
function = "gpio";
};
config {
pins = "gpio54";
drive-strength = <2>; /* 2 mA */
bias-pull-down; /* pull down */
input-enable;
};
};
};
cdc_reset_ctrl {
cdc_reset_sleep: cdc_reset_sleep {
mux {
pins = "gpio64";
function = "gpio";
};
config {
pins = "gpio64";
drive-strength = <16>;
bias-disable;
output-low;
};
};
cdc_reset_active:cdc_reset_active {
mux {
pins = "gpio64";
function = "gpio";
};
config {
pins = "gpio64";
drive-strength = <16>;
bias-pull-down;
output-high;
};
};
};
pri_aux_pcm {
pri_aux_pcm_sleep: pri_aux_pcm_sleep {
mux {

View file

@ -849,6 +849,8 @@
#interrupt-cells = <1>;
interrupt-parent = <&tlmm>;
qcom,gpio-connect = <&tlmm 54 0>;
pinctrl-names = "default";
pinctrl-0 = <&wcd_intr_default>;
};
clock_audio: audio_ext_clk {
@ -939,6 +941,9 @@
30>;
qcom,cdc-reset-gpio = <&tlmm 64 0>;
pinctrl-names = "default", "idle";
pinctrl-0 = <&cdc_reset_active>;
pinctrl-1 = <&cdc_reset_sleep>;
clock-names = "wcd_clk", "wcd_native_clk";
clocks = <&clock_audio clk_audio_pmi_clk>,