ARM: dts: msm: Add pinctrl for codec reset and interrupt on 8996
Change reset and interrupt lines of codec from gpio to pinctrl on 8996 target to control the drive strength of the pins. Change-Id: Ie95b80699f1726c2b2e27c1b8e5f51f7ccdd5417 Signed-off-by: Sudheer Papothi <spapothi@codeaurora.org>
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2 changed files with 48 additions and 0 deletions
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@ -1283,6 +1283,49 @@
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};
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};
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wcd9xxx_intr {
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wcd_intr_default: wcd_intr_default{
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mux {
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pins = "gpio54";
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function = "gpio";
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};
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config {
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pins = "gpio54";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down; /* pull down */
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input-enable;
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};
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};
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};
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cdc_reset_ctrl {
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cdc_reset_sleep: cdc_reset_sleep {
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mux {
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pins = "gpio64";
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function = "gpio";
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};
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config {
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pins = "gpio64";
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drive-strength = <16>;
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bias-disable;
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output-low;
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};
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};
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cdc_reset_active:cdc_reset_active {
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mux {
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pins = "gpio64";
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function = "gpio";
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};
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config {
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pins = "gpio64";
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drive-strength = <16>;
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bias-pull-down;
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output-high;
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};
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};
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};
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pri_aux_pcm {
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pri_aux_pcm_sleep: pri_aux_pcm_sleep {
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mux {
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@ -849,6 +849,8 @@
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#interrupt-cells = <1>;
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interrupt-parent = <&tlmm>;
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qcom,gpio-connect = <&tlmm 54 0>;
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pinctrl-names = "default";
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pinctrl-0 = <&wcd_intr_default>;
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};
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clock_audio: audio_ext_clk {
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@ -939,6 +941,9 @@
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30>;
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qcom,cdc-reset-gpio = <&tlmm 64 0>;
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pinctrl-names = "default", "idle";
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pinctrl-0 = <&cdc_reset_active>;
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pinctrl-1 = <&cdc_reset_sleep>;
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clock-names = "wcd_clk", "wcd_native_clk";
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clocks = <&clock_audio clk_audio_pmi_clk>,
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