evie/android_kernel_oneplus_msm8998
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mhi: core: Set correct DMA mask on device

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Set the correct DMA mask on the platform device to
avoid bounce buffering from the default 32 bit mask.

Change-Id: I7e201e83fd21b0f0a6f57754a3b6f3eded9be58f
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Signed-off-by: Tony Truong <truong@codeaurora.org>
This commit is contained in:
Tony Truong 2015-11-10 15:31:34 -08:00 • committed by David Keitel
parent a603bd09f9
commit f2c54bd2fd
3 changed files with 10 additions and 7 deletions
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5
drivers/platform/msm/mhi/mhi_iface.c
View file

@ -261,9 +261,14 @@ static int mhi_pci_probe(struct pci_dev *pcie_device,
static int mhi_plat_probe(struct platform_device *pdev) static int mhi_plat_probe(struct platform_device *pdev)
{ {
u32 nr_dev = mhi_devices.nr_of_devices; u32 nr_dev = mhi_devices.nr_of_devices;
int r = 0;
mhi_log(MHI_MSG_INFO, "Entered\n"); mhi_log(MHI_MSG_INFO, "Entered\n");
mhi_devices.device_list[nr_dev].plat_dev = pdev; mhi_devices.device_list[nr_dev].plat_dev = pdev;
r = dma_set_mask(&pdev->dev, MHI_DMA_MASK);
if (r)
mhi_log(MHI_MSG_CRITICAL,
"Failed to set mask for DMA ret %d\n", r);
mhi_log(MHI_MSG_INFO, "Exited\n"); mhi_log(MHI_MSG_INFO, "Exited\n");
return 0; return 0;
} }

10
drivers/platform/msm/mhi/mhi_main.c
View file

@ -1154,10 +1154,9 @@ int parse_xfer_event(struct mhi_device_ctxt *ctxt,
"Done. Processed until: %lx.\n", "Done. Processed until: %lx.\n",
(uintptr_t)trb_data_loc); (uintptr_t)trb_data_loc);
break; break;
} else {
local_trb_loc =
(union mhi_xfer_pkt *)local_chan_ctxt->rp;
} }
local_trb_loc =
(union mhi_xfer_pkt *)local_chan_ctxt->rp;
i++; i++;
} while (i < nr_trb_to_parse); } while (i < nr_trb_to_parse);
break; break;
@ -1183,9 +1182,8 @@ int parse_xfer_event(struct mhi_device_ctxt *ctxt,
db_value); db_value);
} }
client_handle = mhi_dev_ctxt->client_handle_list[chan]; client_handle = mhi_dev_ctxt->client_handle_list[chan];
if (NULL != client_handle) { if (NULL != client_handle)
result->transaction_status = -ENOTCONN; result->transaction_status = -ENOTCONN;
}
break; break;
} }
case MHI_EVENT_CC_BAD_TRE: case MHI_EVENT_CC_BAD_TRE:
@ -1435,9 +1433,9 @@ int parse_cmd_event(struct mhi_device_ctxt *mhi_dev_ctxt,
case MHI_EVENT_CC_SUCCESS: case MHI_EVENT_CC_SUCCESS:
{ {
u32 chan = 0; u32 chan = 0;
MHI_TRB_GET_INFO(CMD_TRB_CHID, cmd_pkt, chan); MHI_TRB_GET_INFO(CMD_TRB_CHID, cmd_pkt, chan);
switch (MHI_TRB_READ_INFO(CMD_TRB_TYPE, cmd_pkt)) { switch (MHI_TRB_READ_INFO(CMD_TRB_TYPE, cmd_pkt)) {
mhi_log(MHI_MSG_INFO, "CCE chan %d cmd %d\n", chan, mhi_log(MHI_MSG_INFO, "CCE chan %d cmd %d\n", chan,
MHI_TRB_READ_INFO(CMD_TRB_TYPE, cmd_pkt)); MHI_TRB_READ_INFO(CMD_TRB_TYPE, cmd_pkt));
case MHI_PKT_TYPE_RESET_CHAN_CMD: case MHI_PKT_TYPE_RESET_CHAN_CMD:

2
include/linux/msm_mhi.h
View file

@ -15,7 +15,7 @@
struct mhi_client_handle; struct mhi_client_handle;
#define MHI_DMA_MASK 0x3FFFFFFF #define MHI_DMA_MASK 0xFFFFFFFFFFULL
#define MHI_MAX_MTU 0xFFFF #define MHI_MAX_MTU 0xFFFF
enum MHI_CLIENT_CHANNEL { enum MHI_CLIENT_CHANNEL {