Add USB BAM driver used which allows USB BAM to communicate with other
other peripherals (e.g QDSS or IPA) BAM.
This snapshot is taken as of msm-3.18 commit d5809484bb1b.
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
qpnp-power-on driver have been moved to drivers/input and no
longer present under drivers/platform/msm. Move the DT binding
documentation as well there.
While at it, fix the indentation so that it pass checkpatch.
Change-Id: I32f416d32a57d7c447563d26e4dad24605cdce50
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Device tree bindings documentation for qpnp-revid/coincell are
missing. Add them. These files are taken as a snapshot from
msm-3.18 commit d5809484bb1b (Merge "msm: ipa: fix race condition
when teardown pipe").
Change-Id: I79eeff64e655808414dd23882939bd952e4e279a
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Mutual exclusion between APM switching and LMH register accesses
is only required for HMSS version 1.2 and below on MSM8996. It
is not required for HMSS version 1.2 on MSM8996-Pro. Add support
for MSM8996-Pro so that the LMH mutex is not locked during APM
switching on MSM8996-Pro parts.
Change-Id: If09454827ed12c4d436c2fc792f5adcd45ef4312
Signed-off-by: David Collins <collinsd@codeaurora.org>
Adjust the floor, ceiling, and open-loop voltages for each corner
of each CPR3 regulator based upon aging measurements. This
allows the fixed open-loop voltage adjustment to be reduced since
it no longer has to account for the maximum possible aging
adjustment. This in turn leads to more situations where LDO mode
may be used for the HMSS CPR3 regulators since the LDO must
always operate at the open-loop voltage.
Change-Id: Iaca0ed4b51f258656b5c44dc58f7361814ca3af7
CRs-Fixed: 949622
Signed-off-by: David Collins <collinsd@codeaurora.org>
Add support for the CBF open-loop/closed-loop voltage offset
fuses found on MSM8996-Pro chips. These fuses define independent
open-loop voltages and closed-loop target quotients for the power
cluster and CBF clock which share CPR hardware thread 0. This
independent fusing ensures optimal VDD supply voltage for all
power cluster, performance cluster, CBF corner combinations.
Change-Id: I2e309d683f853f8bd9fd4eb6d12b05c32c7aaf26
CRs-Fixed: 980901
Signed-off-by: David Collins <collinsd@codeaurora.org>
Augment the cpr3-regulator driver to support controllers with full
hardware CPR operation also known as CPR hardening. Also, introduce
the cprh-kbss-regulator driver to handle CPU subsystem specific power
requirements of the msmcobalt chip.
Change-Id: Icac84f9533fa1895ca2466a3793ddaa8b7a4c89c
CRs-Fixed: 967275
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
Voltage boost is a CPR4 hardware feature which raises the VDD supply
voltage when the number of active cores reaches a certain threshold.
It then reduces the voltage back down when the active core count
condition is no longer met. Add support to enable and configure this
feature.
Change-Id: Iccfc2ddddb6621a150235cb2c46adfd1b884dbc2
Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>
Add support for hardware managed per-online-core and per-temperature
voltage adjustment. These adjustment methods may be used together or
independently. The configuration data for these adjustments including
the amount of adjustment for a given corner should be parsed from device
tree. Update the cpr3-regulator driver so that it writes the adjustment
values when enabled into the SDELTA hardware registers.
Change-Id: Idae9018f6a185202d38d210834ca337991fe83d9
Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>
MSM8996-Pro chips contain a fuse which defines the GPU speed bin.
Each speed bin supports a different GPU maximum frequency. Add
support to read this speed bin fuse and use it to parse device
tree properties appropriately.
Change-Id: Ib9b0ba170287ae30802bdb0c64faead8c9bdee8c
Signed-off-by: David Collins <collinsd@codeaurora.org>
The lower Turbo fuse corner reference voltage for speed bin 1
with CPR revision >= 5 only applies to MSM8996v3 chips. It
should not be used on MSM8996-Pro chips. Therefore, add support
to distinguish MSM8996v3 from MSM8996-Pro and add a V3 check
to the reference voltage selection logic.
Change-Id: Iae7d49fe1b2539727160649cbf60ce57b73d639e
Signed-off-by: David Collins <collinsd@codeaurora.org>
Add TTW configuration for PMI8950. Also, add a DT property
(qcom,labibb-ttw-force-lab-on) to keep LAB always-on in TTW mode.
Presently, this property is only required for PMI8950.
CRs-Fixed: 958285 962662
Change-Id: Iec79a6f752067d96fc62a8e9d629c39f4db5ab9f
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Currently, fan53555 regulator driver always registers for
set_suspend_voltage. This force configures the regulator to
set suspend voltage switching to a different voltage selector.
However, this might not be preferred for certain applications.
Add a device tree parameter "fcs,disable-suspend" for the
regulator which when specified will disable suspend voltage
configuration.
CRs-Fixed: 968575
Change-Id: Ib9f450126482e606f3e057857b7a58800583519a
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Halo HL7509 is a digitally programmable buck converter that
outputs a voltage from 600 to 1230 mV from an input voltage of
2.5 to 5.5 V. Since the register mappings are compatible with
FAN53555, add a new vendor ID to support it.
CRs-Fixed: 968575
Change-Id: I0083a7ada311d624731e43755cfd371b2364fb39
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Currently, ESR is being under-estimated when the battery state of
charge (SOC) is less than 2%. Add a change which can do tuning to
use default ESR values when SOC is less than 2% and switch back
to ESR extraction when SOC goes above 2%. When the SOC is greater
than 2% and less than 5%, apply slow settings for ESR pulse. When
the SOC crosses 5%, apply the default settings.
This will allow the SOC to increase more accurately when the FG
starts with a better ESR value. This feature is supported via
device tree property "qcom,esr-pulse-tuning-en".
CRs-Fixed: 953448
Change-Id: I37da8d2a9d795dc3d4daffeaf80a72d188243bfd
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
This devicetree documentation snapshot is taken as of msm-3.18
commit 96a424f00642 (regulator: cpr4: Fix highest voltage corner
open-loop voltage calculation).
Change-Id: I7d65e33e9e501a9175730df676490189effbfd44
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
This devicetree bindings documentation snapshot is taken as of
msm-3.18 commit 96a424f00642 (regulator: cpr4: Fix highest
voltage corner open-loop voltage calculation).
Change-Id: I9b62013a8049c3a22a62b34cd06b87245bcdc5de
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
This devicetree documentation snapshot is taken as of msm-3.18
commit 85b7eb8ac225 ( Merge "ASoC: soc-core: Fix integer
overflow").
Change-Id: I06a15d2668de59db8fca3cae0b69f5d0d3351e05
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
This devicetree bindings documentation snapshot is taken as of
msm-3.18 commit 85b7eb8ac225be (Merge "ASoC: soc-core: Fix
integer overflow").
Change-Id: I50640b74ffe7b3aa29f9f6ca29a012c25c52d157
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Since the following drivers are not present under drivers/power,
remove the DT bindings documentation for them.
Change-Id: I41c08c186b649e21ac376a21632df1414904b1c0
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Add snapshot for Video driver source for MSM targets. The code is
migrated from msm-3.18 kernel at the below commit level -
d5809484bb1bf5864dad2f081b0145224762963a.
Signed-off-by: Arun Menon <avmenon@codeaurora.org>
Add API to get latency for a low power mode with particular
affinity level and reset level. Reset level is level at which
only control logic power collpase happen or both control and
memory logic power collapse happen or Retention state.
The API returns the minum latency out of all clusters in the
particular affinity level and reset level if cluster name is
not passed or the latency of the specific cluster for which
the cluster name is passed.
Change-Id: I2facd9a1fa2dba7e7103d65544537799bd8ba518
Signed-off-by: Srinivas Rao L <lsrao@codeaurora.org>
Conflicts:
arch/arm/boot/dts/qcom/mdm9607-pm.dtsi
arch/arm/boot/dts/qcom/mdm9640-pm.dtsi
arch/arm/boot/dts/qcom/mdmcalifornium-pm.dtsi
arch/arm/boot/dts/qcom/msm8909-pm8909-pm.dtsi
arch/arm/boot/dts/qcom/msm8909-pm8916-pm.dtsi
arch/arm/boot/dts/qcom/msm8937-pm.dtsi
arch/arm/boot/dts/qcom/msm8952-pm.dtsi
arch/arm/boot/dts/qcom/msmgold-pm.dtsi
arch/arm/boot/dts/qcom/msmtitanium-pm.dtsi
This change removes DP DM pulsing functionality related support
from QUSB PHY driver as it is not required.
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
In certain situations, due to resolution mismatch, we may need to
scale up/down the X and Y co-ordinates returned by the touch controller.
Add support for the same where we scale up/down the X and Y touch
co-ordinates returned from the touch controller before sending it to
android. In such cases, we also need to ensure that the display resolution
matches the touch resolution. Add support for that as well.
Change-Id: Ia2dabf480478e26db1e1f0d92ca9ba5a252f18eb
Signed-off-by: Shantanu Jain <shjain@codeaurora.org>
During device resume, the touch resume function is called after
display resume. Touch resume function will take about >200ms.
Defer the touch resume function to a workqueue to reduce the total
device resume time. An optional DT property is added to enable this
on targets that need this feature.
Change-Id: Ia9b055144c5a7f29f0f0d57428cccbe15a7d7a87
Signed-off-by: zhaoyuan <yzhao@codeaurora.org>
Add support for configuring short circuit debounce cycles in
both LCD mode and AMOLED mode. Also, when configuring the
WLED SHORT_PROTECT register, the bits corresponding to DBNC_SHORT
bit fields are incorrectly written, so correct the corresponding
bitmask and the associated code logic to avoid this. Add an
explicit SPMI write to WLED1_CTRL_SOFTSTART_RAMP_DELAY register
as well for LCD mode.
Change-Id: Ibae8926262c52c8db3d04ab355651e5df44ec090
Signed-off-by: Himanshu Aggarwal <haggarwa@codeaurora.org>
Signed-off-by: Shantanu Jain <shjain@codeaurora.org>
Add a quirk to mask out the RB 1-3 activity signals in the hang
detection logic. Set this quirk in the devicetree for 8996v2 and
v3.
CRs-Fixed: 978849
Change-Id: I63073b5973644453e775b41a9361de55d7933a07
Signed-off-by: Shrenuj Bansal <shrenujb@codeaurora.org>
During the initialization sequence, submit a set of important
packets to the GPU in order to pre-load the I-cache with the
critical ucode instructions.
CRs-Fixed: 978777
Change-Id: Ic6a17b24d8c3aa383af8e25cf9ef771459d65796
Signed-off-by: Shrenuj Bansal <shrenujb@codeaurora.org>
This patch adds a snapshot of the QPNP misc driver as of msm-3.14
commit:
e016c39467094409c9c872b02ec619164913054a (Merge "msm: thermal:
Fix compilation issue when THERMAL_MONITOR is disabled")
CRs-Fixed: 972331
Change-Id: I48dc9857379c388ddff86b20320cdfa23bb22af8
Signed-off-by: Andy Gross <agross@codeaurora.org>
Signed-off-by: Devesh Jhunjhunwala <deveshj@codeaurora.org>
Add support for multitouch procotol B, in order to track
object based ID touch activities.
Change-Id: I9b6941b3fea2f5c28434793073330cd4abe9fa74
Signed-off-by: Jigarkumar Kishorkumar Zala <j_zala@codeaurora.org>
Slimbus master is present in different subsystem
on different tragets.
Register with specific subsystem as mentioned in
the device tree.
Change-Id: I1bee7fdd7578deedca8e4e43af9055b41b96d652
Signed-off-by: Dilip Kota <dkota@codeaurora.org>
With 3.18 kernel, get_session_time command to
DSP is updated to new command. This
command is not supported on older targets as
they have an older DSP version. To have backwards
compatibility, based on DSP version choose which
command to use.
CRs-Fixed: 978676
Change-Id: I76b0cfcd84df90d7a206690cb8aa1eb773fdc53d
Signed-off-by: Ashish Jain <ashishj@codeaurora.org>
The Operating State Manager is a hardware block which deals with
performing voltage and frequency change operations in the CPUSS. Two
instances exist, one for each cluster, in the msmcobalt chip.
Introduce the OSM clock driver to perform the required OSM hardware
block initialization and support DCVS scale requests.
Change-Id: I3e155db5cd580e371ca1791815e4942f442a3d20
CRs-Fixed: 967319
Signed-off-by: Pushkar Joshi <pushkarj@codeaurora.org>
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
Codec reset gpio configuration needs to be updated
before slimbus master component is initialized otherwise
codec cannot be enumerated on the bus. Add a new platform
device driver to update the codec reset gpio configuration
to valid state (output, drive-strength) before slimbus
is initialized.
CRs-Fixed: 968161
Change-Id: I7227212e6b846d58196718255aa4b0923352d120
Signed-off-by: Phani Kumar Uppalapati <phaniu@codeaurora.org>
Some platforms support multiple GPU clock plans based on the speed
bin in the efuse. Specify the wake up frequency of each speed bin
individually to wake the gpu at the correct powerlevel.
CRs-Fixed: 967494
Change-Id: I9890b8a710d7055c30f9ae7612b092af8fa8a9f5
Signed-off-by: Suman Tatiraju <sumant@codeaurora.org>
On 5XX targets we need to program the bit of the highest DDR bank
into a number of registers, one of which is protected which would
cause problems if the user mode driver tried to write to it.
Specify the high bank bit in the device tree files, set the
problematic register in the kernel and then pass the value up to
the user mode driver as a property and let them program the
other registers. This makes the device tree the authoratative
source of the high bit value which is exactly how it should be.
If the value isn't specified by the device tree for whatever reason
return an error for the property request - that will give the UMD
a clue that the value wasn't specified and they should just set a
default.
CRs-Fixed: 970272
Change-Id: Ic0dedbad830321329b74da7fa3e172fdaf765c4d
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Add a devicetree property disable-busy-time-burst to
disable ceiling threshold in the governor. The ceiling threshold
cause busy time burst that switch power level for
large frames based on busy time.
Change-Id: I44f8a51e0aa49bb0b2210703f57874fd5f219c18
Signed-off-by: Divya Ponnusamy <pdivya@codeaurora.org>
Speed bin information is sometimes written to efuses to
specify a GPU frequency plan available on a platform. The
current code only supports reading the efuses for msm8996v3.
Hence specify it in the platform device tree node to
support multiple platforms.
CRs-Fixed: 967494
Change-Id: I5db4d5a35e2700250517ea6cac3d4d736936ce9f
Signed-off-by: Suman Tatiraju <sumant@codeaurora.org>
Enable direct programming of GPU-BIMC interface clocks
from kernel driver when moving in and out of TURBO.
This is done only for targets with a device tree
entry defined for GPU-BIMC interface.
This is done because some targets do not support
B/W requirement of GPU at TURBO, for such targets
we need to program the GPU-BIMC interface clocks
with TURBO values to meet the B/W goals.
Change-Id: Ibe82db8718040513ae0d96366195d41001549189
Signed-off-by: Sunil Khatri <sunilkh@codeaurora.org>
This patch adds support for SSM driver which is
a framework to which a client can register itself specifying
different attributes and defining various permission levels associated
with different combination of attribute values and mode of the system.
CRs-Fixed: 970190
Change-Id: Ia030ebad56a22ba9103af17f6557c7906b762b76
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
Signed-off-by: Manoj Prabhu B <bmanoj@codeaurora.org>
If any of the Graphics rendering threads are running
on masked CPUs, avoid L2PC for some duration on that
CPU. This reduces latency on CPU (latency mainly
because of L2 cache flush) and helps on performance.
This change uses pm_qos_update_request_timeout() API.
Add l2pc-cpu-mask property in device tree to enable
this.
CRs-Fixed: 962598
Change-Id: If90090cd2c68ea7c07e269723931fef7201ef136
Signed-off-by: Prakash Kamliya <pkamliya@codeaurora.org>
Add settings to switch to always-on clock source during certain
LPM mode exit paths on msm8996 Pro.
CRs-Fixed: 968587
Change-Id: I6138681e2a85b7d1ad11350718544de6abe38131
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
Add support to model the multimedia clocks on MSMCOBALT.
Change-Id: Iec33fa93e745a65205cf4206759289d7e842fe36
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
FPC using PSCI is entered from PSCI layer that is in Secure EL1.
Switching of EL layers incur additional latency, making FPC slower.
Issue wfi within hypervisor for cpu only sleep. This makes FPC much
faster than entering from PSCI layer.
Change-Id: Icf4c5f2484fdda79c991b842cb3a3185b638bfdb
Signed-off-by: Archana Sathyakumar <asathyak@codeaurora.org>
Add support to model the graphics clocks on MSMCOBALT.
Change-Id: I31c3dda59a0bb7e9b6b6cee8176fb46f46767629
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
MSM Cobalt TSENS supports upto 22 temperature
sensors across two TSENS controllers. Thermal
clients have the ability to set temperature
threshold and receive notification on a threshold
crossing.
Change-Id: I05d6f7cfceece6c27ef5d03b9ea3b77d409108db
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
Add support to modify the completion timeout range for
the root complex. This value/range will inform when
the root complex should send out a completion if the
endpoint does not respond.
Change-Id: Iabca3f637d9abf6c93810c84d81ff6b5c77d4528
Signed-off-by: Tony Truong <truong@codeaurora.org>
In some targets, explicitly turning on/off the regulator for WLAN
antenna switch is needed to enable/dsiable antenna sharing capacity.
Hence add the change to achieve this based on device tree option.
Change-Id: Ic04019cbe9c42bc92a65f308f56f307c52346d92
Signed-off-by: Yue Ma <yuem@codeaurora.org>
