Commit graph

1966 commits

Author SHA1 Message Date
Tony Prisk
518d4709f1 clk: vt8500: Add support for clocks on the WM8850 SoCs
The WM8850 has a different PLL clock to the previous versions. This
patch adds support for the WM8850-style PLL clocks.

Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-05-29 14:47:05 -07:00
Nicolas Pitre
1e904e1bf6 ARM: vexpress: introduce DCSCB support
This adds basic CPU and cluster reset controls on RTSM for the
A15x4-A7x4 model configuration using the Dual Cluster System
Configuration Block (DCSCB).

The cache coherency interconnect (CCI) is not handled yet.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Pawel Moll <pawel.moll@arm.com>
2013-05-29 15:50:34 -04:00
Lorenzo Pieralisi
ed69bdd8fd drivers: bus: add ARM CCI support
On ARM multi-cluster systems coherency between cores running on
different clusters is managed by the cache-coherent interconnect (CCI).
It allows broadcasting of TLB invalidates and memory barriers and it
guarantees cache coherency at system level through snooping of slave
interfaces connected to it.

This patch enables the basic infrastructure required in Linux to handle and
programme the CCI component.

Non-local variables used by the CCI management functions called by power
down function calls after disabling the cache must be flushed out to main
memory in advance, otherwise incoherency of those values may occur if they
are sitting in the cache of some other CPU when power down functions
execute. Driver code ensures that relevant data structures are flushed
from inner and outer caches after the driver probe is completed.

CCI slave port resources are linked to set of CPUs through bus masters
phandle properties that link the interface resources to masters node in
the device tree.

Documentation describing the CCI DT bindings is provided with the patch.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2013-05-29 15:50:34 -04:00
Maxime Ripard
ec3805e619 ARM: sunxi: irqchip: Update the documentation
A10 and A13 have a different set of available interrupt sources, reflect
this in the documentation.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-05-29 09:39:39 +02:00
Maxime Ripard
4f985b4c80 clk: sun5i: Add compatibles for Allwinner A13
The A13 has a lot less clocks than the one found in the Allwinner A10.
Add these stripped down clocks to the clock driver and in the
documentation.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-05-28 22:50:31 -07:00
Sebastian Hesselbarth
1a0483d2a4 clk: si5351: Allow user to define disabled state for every clock output
This patch adds platform data and DT bindings to allow to overwrite
the stored disabled state for each clock output.

Signed-off-by: Marek Belisko <marek.belisko@streamunlimited.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-05-28 22:50:31 -07:00
Stephen Warren
220cf5fb5c Merge branch 'for-3.11/deps-for-clk' into for-3.11/dt 2013-05-28 16:12:21 -06:00
Hiroshi Doyu
992bb598f6 ARM: tegra114: create a DT header defining CLK IDs
Create a header file to define the clock IDs used by the Tegra114 clock
binding. Remove the list of definitions from the binding documentation,
and refer the reader to the header file.

This will allow the same header to be used by both device tree files,
and drivers implementing this binding, which guarantees that the two
stay in sync. This also makes device trees more readable by using names
instead of magic numbers.

Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
[swarren, add header to clock/ instead of clk/ to match binding location]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28 16:11:11 -06:00
Hiroshi Doyu
9513109df8 ARM: tegra30: create a DT header defining CLK IDs
Create a header file to define the clock IDs used by the Tegra30 clock
binding. Remove the list of definitions from the binding documentation,
and refer the reader to the header file.

This will allow the same header to be used by both device tree files,
and drivers implementing this binding, which guarantees that the two
stay in sync. This also makes device trees more readable by using names
instead of magic numbers.

Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
[swarren, add header to clock/ instead of clk/ to match binding location]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28 16:10:53 -06:00
Hiroshi Doyu
ec23ad67f6 ARM: tegra20: create a DT header defining CLK IDs
Create a header file to define the clock IDs used by the Tegra20 clock
binding. Remove the list of definitions from the binding documentation,
and refer the reader to the header file.

This will allow the same header to be used by both device tree files,
and drivers implementing this binding, which guarantees that the two
stay in sync. This also makes device trees more readable by using names
instead of magic numbers.

Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
[swarren, add header to clock/ instead of clk/ to match binding location]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28 16:10:39 -06:00
Maxime Ripard
bbc79089ae video: ssd1307fb: Add support for SSD1306 OLED controller
The Solomon SSD1306 OLED controller is very similar to the SSD1307,
except for the fact that the power is given through an external PWM for
the 1307, and while the 1306 can generate its own power without any PWM.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2013-05-28 14:41:57 +03:00
Anatol Pomozov
f884ab15af doc: fix misspellings with 'codespell' tool
Signed-off-by: Anatol Pomozov <anatol.pomozov@gmail.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2013-05-28 12:02:12 +02:00
Jean-Christophe PLAGNIOL-VILLARD
87227b8b2d net: micrel : ks8851-ml: add dt support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: netdev@vger.kernel.org
Signed-off-by: David S. Miller <davem@davemloft.net>
2013-05-27 23:17:53 -07:00
Olof Johansson
ff753f43da Device tree patches for the Nomadik machine:
- Move clock registration to the device tree
 - Support probing the MTU timer from the device tree
 - Register user LED and user key in the device tree
 - Update defconfig to account for user LED and user key
 - Move pin control mappings to the device tree
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Merge tag 'nomadik-dt-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt

From Linus Walleij:
Device tree patches for the Nomadik machine:
- Move clock registration to the device tree
- Support probing the MTU timer from the device tree
- Register user LED and user key in the device tree
- Update defconfig to account for user LED and user key
- Move pin control mappings to the device tree

* tag 'nomadik-dt-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
  ARM: nomadik: move the pin configuration to DT
  ARM: nomadik: add led and key for S8815
  ARM: nomadik: register clocksource from device tree
  ARM: nomadik: convert all clocks except timer to dt
  clocksource: nomadik-mtu: support of probe

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-05-27 21:20:17 -07:00
Olof Johansson
6f39ef575d This is a set of patches from Lee Jones to start converting
the ux500 to fetch DMA channels from the device tree:
 - Full DT support and channel mapping in the DMA40 driver
 - Dropping of platform data for migrated devices on the DT
   boot path.
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Merge tag 'ux500-dma40-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/drivers

From Linus Walleij:
This is a set of patches from Lee Jones to start converting
the ux500 to fetch DMA channels from the device tree:
- Full DT support and channel mapping in the DMA40 driver
- Dropping of platform data for migrated devices on the DT
  boot path.

* tag 'ux500-dma40-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: (36 commits)
  ARM: ux500: Register Cryp and Hash platform drivers on Snowball
  crypto: ux500/[cryp|hash] - Show successful start-up in the bootlog
  ARM: ux500: Stop passing Cryp DMA channel config information though pdata
  crypto: ux500/cryp - Set DMA configuration though dma_slave_config()
  crypto: ux500/cryp - Prepare clock before enabling it
  ARM: ux500: Stop passing Hash DMA channel config information though pdata
  crypto: ux500/hash - Set DMA configuration though dma_slave_config()
  crypto: ux500/hash - Prepare clock before enabling it
  ARM: ux500: Remove unnecessary attributes from DMA channel request pdata
  dmaengine: ste_dma40: Correct copy/paste error
  ARM: ux500: Remove DMA address look-up table
  dmaengine: ste_dma40: Remove redundant address fetching function
  dmaengine: ste_dma40: Only use addresses passed as configuration information
  ARM: ux500: Stop passing UART's platform data for Device Tree boots
  dmaengine: ste_dma40: Don't configure runtime configurable setup during allocate
  dmaengine: ste_dma40: Remove unnecessary call to d40_phy_cfg()
  dmaengine: ste_dma40: Separate Logical Global Interrupt Mask (GIM) unmasking
  ARM: ux500: Pass remnant platform data though to DMA40 driver
  dmaengine: ste_dma40: Supply full Device Tree parsing support
  dmaengine: ste_dma40: Allow driver to be probe()able when DT is enabled
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-05-27 20:10:04 -07:00
Eduardo Valentin
eb982001db thermal: introduce TI SoC thermal driver
This patch moves the ti-soc-thermal driver out of
the staging tree to the thermal tree.

Cc: Grant Likely <grant.likely@linaro.org>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Rob Landley <rob@landley.net>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <eduardo.valentin@ti.com>
Cc: J Keerthy <j-keerthy@ti.com>
Cc: Radhesh Fadnis <radhesh.fadnis@ti.com>
Cc: Cyril Roelandt <tipecaml@gmail.com>
Cc: devicetree-discuss@lists.ozlabs.org
Cc: linux-doc@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: devel@driverdev.osuosl.org
Cc: linux-pm@vger.kernel.org
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
2013-05-28 10:40:37 +08:00
Thomas Petazzoni
005625fc5d pci: mvebu: enable driver usage on Kirkwood
We allow the pci-mvebu driver to be compiled on the Kirkwood platform,
and add the 'marvell,kirkwood-pcie' as a compatible string supported
by the driver.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-05-27 16:02:10 +00:00
Fabio Baltieri
99b38eef5a ARM: ux500: Fix intcore regulator name
Ux500 regulator name for V-INTCORE is misspelled as vinitcore instead of
vintcore in some .dts file, causing the AB8500 regulator driver to not
bind properly.  Fix this by replacing all occurrences with the right
name.

Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-27 14:07:11 +02:00
Soren Brinkmann
97c4e87d45 clk: zynq: Remove deprecated clock code
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Rob Landley <rob@landley.net>
Cc: devicetree-discuss@lists.ozlabs.org
Cc: linux-doc@vger.kernel.org
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
2013-05-27 09:21:49 +02:00
Soren Brinkmann
0ee52b157b clk: zynq: Add clock controller driver
Add a clock controller driver and documentation.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Rob Landley <rob@landley.net>
Cc: devicetree-discuss@lists.ozlabs.org
Cc: linux-doc@vger.kernel.org
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
2013-05-27 09:21:17 +02:00
Greg Kroah-Hartman
829455bb0e Merge 3.10-rc3 into staging-next
We want the changes here, and we resolve the merge conflict that was
happening in the nvec_kbd.c file.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-05-27 10:54:33 +09:00
Greg Kroah-Hartman
f35c69b736 Merge 3.10-rc3 into char-misc-next
We want the changes in here.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-05-27 10:40:19 +09:00
Daniel Mack
04561eacaa ASoC: codecs: adau1701: add DT bindings
Apart from pure matching, the bindings also support setting the the
reset gpio line.

Signed-off-by: Daniel Mack <zonque@gmail.com>
Acked-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2013-05-25 10:34:45 -04:00
Lars-Peter Clausen
b6b5e76bb8 ASoC: Add ssm2518 support
This patch adds a ASoC CODEC driver for the SSM2516. The SSM2516 is a stereo
Class-D audio amplifier with an I2S interface for audio in and a built-in
dynamic range control processor.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2013-05-25 10:33:30 -04:00
Linus Torvalds
9cf1848278 Merge branch 'akpm' (incoming from Andrew Morton)
Merge fixes from Andrew Morton:
 "A bunch of fixes and one simple fbdev driver which missed the merge
  window because people will still talking about it (to no great
  effect)."

* emailed patches from Andrew Morton <akpm@linux-foundation.org>: (30 commits)
  aio: fix kioctx not being freed after cancellation at exit time
  mm/pagewalk.c: walk_page_range should avoid VM_PFNMAP areas
  drivers/rtc/rtc-max8998.c: check for pdata presence before dereferencing
  ocfs2: goto out_unlock if ocfs2_get_clusters_nocache() failed in ocfs2_fiemap()
  random: fix accounting race condition with lockless irq entropy_count update
  drivers/char/random.c: fix priming of last_data
  mm/memory_hotplug.c: fix printk format warnings
  nilfs2: fix issue of nilfs_set_page_dirty() for page at EOF boundary
  drivers/block/brd.c: fix brd_lookup_page() race
  fbdev: FB_GOLDFISH should depend on HAS_DMA
  drivers/rtc/rtc-pl031.c: pass correct pointer to free_irq()
  auditfilter.c: fix kernel-doc warnings
  aio: fix io_getevents documentation
  revert "selftest: add simple test for soft-dirty bit"
  drivers/leds/leds-ot200.c: fix error caused by shifted mask
  mm/THP: use pmd_populate() to update the pmd with pgtable_t pointer
  linux/kernel.h: fix kernel-doc warning
  mm compaction: fix of improper cache flush in migration code
  rapidio/tsi721: fix bug in MSI interrupt handling
  hfs: avoid crash in hfs_bnode_create
  ...
2013-05-24 18:12:15 -07:00
David S. Miller
e6ff4c75f9 Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Merge net into net-next because some upcoming net-next changes
build on top of bug fixes that went into net.

Signed-off-by: David S. Miller <davem@davemloft.net>
2013-05-24 16:48:28 -07:00
Stephen Warren
26549c8d36 drivers/video: implement a simple framebuffer driver
A simple frame-buffer describes a raw memory region that may be rendered
to, with the assumption that the display hardware has already been set
up to scan out from that buffer.

This is useful in cases where a bootloader exists and has set up the
display hardware, but a Linux driver doesn't yet exist for the display
hardware.

Examples use-cases include:

* The built-in LCD panels on the Samsung ARM chromebook, and Tegra
  devices, and likely many other ARM or embedded systems.  These cannot
  yet be supported using a full graphics driver, since the panel control
  should be provided by the CDF (Common Display Framework), which has been
  stuck in design/review for quite some time.  One could support these
  panels using custom SoC-specific code, but there is a desire to use
  common infra-structure rather than having each SoC vendor invent their
  own code, hence the desire to wait for CDF.

* Hardware for which a full graphics driver is not yet available, and
  the path to obtain one upstream isn't yet clear.  For example, the
  Raspberry Pi.

* Any hardware in early stages of upstreaming, before a full graphics
  driver has been tackled.  This driver can provide a graphical boot
  console (even full X support) much earlier in the upstreaming process,
  thus making new SoC or board support more generally useful earlier.

[akpm@linux-foundation.org: make simplefb_formats[] static]
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Acked-by: Olof Johansson <olof@lixom.net>
Cc: Rob Clark <robclark@gmail.com>
Cc: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-05-24 16:22:51 -07:00
Jean-Christophe PLAGNIOL-VILLARD
4a3ae9324e USB: gadget: atmel_usba: add DT support
Allow to compile the driver all the time if AT91 enabled.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Felipe Balbi <balbi@ti.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Tested-by: Bo Shen <voice.shen@atmel.com>
2013-05-24 07:14:45 +08:00
Lee Jones
fa332de5c6 dmaengine: ste_dma40: Supply full Device Tree parsing support
Using the new DMA DT bindings and API, we can register the DMA40 driver
as Device Tree capable. Now, when a client attempts to allocate a
channel using the DMA DT bindings via its own node, we are able to parse
the request and allocate a channel in the correct manner.

Cc: Dan Williams <djbw@fb.com>
Cc: Per Forlin <per.forlin@stericsson.com>
Cc: Rabin Vincent <rabin@rab.in>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: devicetree-discuss@lists.ozlabs.org
Acked-by: Vinod Koul <vinod.koul@intel.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-23 21:13:08 +02:00
Jacek Anaszewski
f4b7f751c6 iio:ak8975 Add support for gpios DT property
Add support for parsing 'gpios' property when initializing
from oftree.
This patch adds also the binding documentation file.

Signed-off-by: Jacek Anaszewski <j.anaszewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2013-05-22 22:16:48 +01:00
Ezequiel Garcia
3edad321b1 drivers: memory: Introduce Marvell EBU Device Bus driver
Marvell EBU SoCs such as Armada 370/XP, Orion5x (88f5xxx) and
Discovery (mv78xx0) supports a Device Bus controller to access several
kinds of memories and I/O devices (NOR, NAND, SRAM, FPGA).

This commit adds a driver to handle this controller. So far only
Armada 370, Armada XP and Discovery SoCs are supported.

The driver must be registered through a device tree node;
as explained in the binding document.

For each child node in the device tree, this driver will:
  * set timing parameters
  * register a child device
  * setup an address decoding window, using the mbus driver

Keep in mind the address decoding window setup is only a temporary hack.
This code will be removed from this devbus driver as soon as a proper device
tree binding for the mbus driver is added.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-05-21 10:11:56 -07:00
Sylwester Nawrocki
c79b069d72 [media] exynos4-is: Correct fimc-lite compatible property description
Ensure the compatible property for FIMC-LITE IP blocks is properly
documented, a cut&paste error fix.

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
2013-05-21 08:37:27 -03:00
Olof Johansson
8582df0f63 Merge tag 'at91-fixes' of git://github.com/at91linux/linux-at91 into fixes
From Nicolas Ferre:
An important revert on at91rm9200 platform related
to timers that prevented the platform to boot properly.
Then one pinctrl adjustments for SPI CS and a couple of
trivial typos.

* tag 'at91-fixes' of git://github.com/at91linux/linux-at91:
  ARM: at91: rm9200 fix time support
  ARM: at91: dts: request only spi cs-gpios used on sama5d3x cpu module
  ARM: at91/trivial: typo in GEM compatible string
  ARM: at91/trivial: fix model name for SAM9X25-EK

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-05-20 23:30:50 -07:00
Kim, Milo
00fd6e6153 regulator: lp872x: support the device tree feature
This patch enables the DT structure of the LP8720 and LP8725 device.
The LP872x platform data is generated when the device tree is configured.
Even if the platform data is NULL, it is no issue at all because the driver is
configured with the default mode.

Signed-off-by: Milo(Woogyom) Kim <milo.kim@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2013-05-20 18:13:44 -05:00
Tomasz Figa
0b8bf1baab net: dm9000: Allow instantiation using device tree
This patch adds Device Tree support to dm9000 driver.

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Reviewed-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
2013-05-20 14:03:51 -07:00
Tony Prisk
6dffbe53fb net: velocity: Add platform device support to VIA velocity driver
Add support for the VIA Velocity network driver to be bound to a
OF created platform device.

Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
Signed-off-by: David S. Miller <davem@davemloft.net>
2013-05-20 13:40:39 -07:00
Thomas Petazzoni
45361a4fe4 pci: PCIe driver for Marvell Armada 370/XP systems
This driver implements the support for the PCIe interfaces on the
Marvell Armada 370/XP ARM SoCs. In the future, it might be extended to
cover earlier families of Marvell SoCs, such as Dove, Orion and
Kirkwood.

The driver implements the hw_pci operations needed by the core ARM PCI
code to setup PCI devices and get their corresponding IRQs, and the
pci_ops operations that are used by the PCI core to read/write the
configuration space of PCI devices.

Since the PCIe interfaces of Marvell SoCs are completely separate and
not linked together in a bus, this driver sets up an emulated PCI host
bridge, with one PCI-to-PCI bridge as child for each hardware PCIe
interface.

In addition, this driver enumerates the different PCIe slots, and for
those having a device plugged in, it sets up the necessary address
decoding windows, using the mvebu-mbus driver.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-05-20 19:18:44 +00:00
Heiko Stuebner
af99a75074 pinctrl: Add pinctrl-s3c24xx driver
The s3c24xx pins follow a similar pattern as the other Samsung SoCs and
can therefore reuse the already introduced infrastructure.

The s3c24xx SoCs have one design oddity in that the first 4 external
interrupts do not reside in the eint pending register but in the main
interrupt controller instead. We solve this by forwarding the external
interrupt from the main controller into the irq domain of the pin bank.
The masking/acking of these interrupts is handled in the same way.

Furthermore the S3C2412/2413 SoCs contain another oddity in that they
keep the same 4 eints in the main interrupt controller and eintpend
register and requiring ack operations to happen in both. This is solved
by using different compatible properties for the wakeup eint node which
set a property accordingly.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-05-21 00:56:13 +09:00
Mark Brown
d781009ca6 mfd: Add device tree bindings for Arizona class devices
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2013-05-20 08:13:36 -05:00
Linus Torvalds
ff9129b06c Device tree bug fixes and documentation updates for v3.10
Nothing earth shattering here. A build failure fix, and fix for
 releasing nodes and some documenation updates.
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Merge tag 'devicetree-for-linus' of git://git.secretlab.ca/git/linux

Pull device tree fixes from Grant Likely:
 "Device tree bug fixes and documentation updates for v3.10

  Nothing earth shattering here.  A build failure fix, and fix for
  releasing nodes and some documenation updates."

* tag 'devicetree-for-linus' of git://git.secretlab.ca/git/linux:
  Documentation/devicetree: make semantic of initrd-end more explicit
  of/base: release the node correctly in of_parse_phandle_with_args()
  of/documentation: move video device bindings to a common place
  <linux/of_platform.h>: fix compilation warnings with DT disabled
2013-05-18 10:46:50 -07:00
Venu Byravarasu
d400f209b4 ARM: tegra: finalize USB EHCI and PHY bindings
The existing Tegra USB bindings have a few issues:

1) Many properties are documented as being part of the EHCI controller
node, yet they apply more to the PHY device. They should be moved.

2) Some registers in PHY1 are shared with PHY3, and hence PHY3 needs a
reg entry to point at PHY1's register space. We can't assume the PHY1
driver is present, so the PHY3 driver will directly access those
registers.

3) The list of clocks required by the PHY was missing some required
entries.

4) UTMI PHY Timing parameters are added

5) VBUS control is now specified using a regulator rather than a plain GPIO

6) Added nvidia,is-wired property to indicate whether the device is
hard wired on the board, or pluggable.

This patch fixes the binding definition to resolve these issues.

Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-17 16:21:08 -06:00
Jon Hunter
f40739faba ARM: dts: OMAP2+: Simplify NAND support
Commit 8c8a777 (ARM: OMAP2+: Add function to read GPMC settings from
device-tree) added a device-tree property "gpmc,device-nand" to indicate
is the GPMC child device is NAND. This commit should have updated the
GPMC NAND documentation (Documentation/devicetree/bindings/mtd/gpmc-nand.txt)
to list the property "gpmc,device-nand" as a required property and also
updated the example. However, this property is redundant and not needed
because the GPMC child device node for NAND is called "nand". Therefore,
remove this property.

Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-05-16 09:21:19 -07:00
Mark Jackson
496c8a0bbb ARM: OMAP2+: Allow NAND transfer mode to be specified in DT
OMAP devices support various NAND transfer modes.

Currently all device-tree definitions will use the default "prefetch
polled" mode, so this patch enables the transfer mode to be specified
in the device-tree.

Signed-off-by: Mark Jackson <mpfj@newflow.co.uk>
Acked-by: Pekon Gupta <pekon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-05-16 08:53:22 -07:00
Christian Daudt
3b656fed6f ARM: 7716/1: bcm281xx: Add L2 support for Rev A2 chips
Rev A2 SoCs have an unorthodox memory re-mapping and this needs
to be reflected in the cache operations.
This patch adds new outer cache functions for the l2x0 driver
to support this SoC revision. It also adds a new compatible
value for the cache to enable this functionality.

Updates from V1:
- remove section 1 altogether and note that in comments
- simplify section selection caused by section 1 removal
- BUG_ON just in case section 1 shows up

Signed-off-by: Christian Daudt <csd@broadcom.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-05-15 19:39:27 +01:00
Nicolas Ferre
5ade7e4214 ARM: at91/trivial: typo in GEM compatible string
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-05-14 15:33:35 +02:00
Shawn Guo
62477adf5f ASoC: mxs: move to use generic DMA helper
With mxs-dma converted to generic DMA bindings, let's move mxs-pcm to
use it by removing flages SND_DMAENGINE_PCM_FLAG_NO_DT and
SND_DMAENGINE_PCM_FLAG_COMPAT.  As the result, those mxs custom dma
params code can be removed now.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2013-05-13 09:55:28 +04:00
Linus Walleij
6e2b07a172 ARM: nomadik: convert all clocks except timer to dt
This moves all Nomadik clocks except the one used for the
timer/clocksource over to the device tree.

Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-12 21:49:56 +02:00
Marek Belisko
f9c8ba8965 ASoC: spdif_receiver: Add DT support.
Add devicetree support for this dummy audio soc driver.

Signed-off-by: Michal Bachraty <michal.bachraty@streamunlimited.com>
Signed-off-by: Marek Belisko <marek.belisko@streamunlimited.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2013-05-12 20:51:06 +04:00
Marek Belisko
1b7c8b350f ASoC: spdif_transmitter: Add DT support.
Add devicetree support for this dummy audio soc driver.

Signed-off-by: Michal Bachraty <michal.bachraty@streamunlimited.com>
Signed-off-by: Marek Belisko <marek.belisko@streamunlimited.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2013-05-12 20:51:06 +04:00
Andrii.Tseglytskyi
40b1936efe regulator: Introduce TI Adaptive Body Bias(ABB) on-chip LDO driver
Adaptive Body Biasing (ABB) modulates transistor bias voltages
dynamically in order to optimize switching speed versus leakage.

Texas Instruments' SmartReflex 2 technology provides support for this
power management technique with Forward Body Biasing (FBB) and Reverse
Body Biasing (RBB). These modulate the body voltage of transistor
cells or blocks dynamically to gain performance and reduce leakage.
TI's SmartReflex white paper[1] has further information for usage in
conjunction with other power management techniques.

The application of FBB/RBB technique is determined for each unique
device in some process nodes, whereas, they are mandated on other
process nodes.

In a nutshell, ABB technique is implemented on TI SoC as an on-chip
LDO which has ABB module controlling the bias voltage. However, the
voltage is unique per device. These vary per SoC family and the manner
in which these techniques are used may vary depending on the Operating
Performance Point (OPP) voltage targeted. For example:
OMAP3630/OMAP4430: certain OPPs mandate usage of FBB independent of
	devices.
OMAP4460/OMAP4470: certain OPPs mandate usage of FBB, while others may
	optionally use FBB or optimization with RBB.
OMAP5: ALL OPPs may optionally use ABB, and ABB biasing voltage is
	influenced by vset fused in s/w and requiring s/w override of
	default values.

Further, two generations of ABB module are used in various TI SoCs.
They have remained mostly register field compatible, however the
register offset had switched between versions.

We introduce ABB LDO support in the form of a regulator which is
controlled by voltages denoting the desired Operating Performance
Point which is targeted. However, since ABB transition is part of OPP
change sequence, the sequencing required to ensure sane operation
w.r.t OPP change is left to the controlling driver (example: cpufreq
SoC driver) using standard regulator operations.

The driver supports all ABB modes and ability to override ABB LDO vset
control efuse based ABB mode detection etc.

Current implementation is heavily influenced by the original patch
series [2][3] from Mike Turquette. However, the current implementation
supports only device tree based information.

[1] http://www.ti.com/pdfs/wtbu/smartreflex_whitepaper.pdf
[2] http://marc.info/?l=linux-omap&m=134931341818379&w=2
[3] http://marc.info/?l=linux-arm-kernel&m=134931402406853&w=2

[nm@ti.com: co-developer]
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Andrii.Tseglytskyi <andrii.tseglytskyi@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2013-05-12 18:31:36 +04:00