This snapshot is taken as of msm-3.18 commit
d580948 (Merge "msm: ipa: fix race condition when teardown pipe")
Signed-off-by: Sungjun Park <sjpark@codeaurora.org>
This change removes unused devicetree property with QMP PHY
as now all QMP PHY related initialization information needs to
be provided through devicetree.
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
This change removes QMP PHY revision based phy_reg_offset from
QMP PHY driver. It makes mandatory to have required QMP PHY
related register offset through devicetree. It also removes
different revision ID related register offset usage and
requirement.
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
This change removes QMP PHY revision based initialization sequence
from QMP PHY driver. It also makes mandatory to get this sequence
from devicetree except if qcom,emulation is set.
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
The efficiency of a CPU can vary across SoCs depending on the cache size,
bus interconnect frequencies etc. Allow specifying this from the device
tree. This value overrides the default values hardcoded in the efficiency
table.
Change-Id: Ie9ba69e11317e6eb6462630226355747d1def646
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
Add extcon listeners for EXTCON_USB and EXTCON_USB_HOST cable
types to be notified of VBUS and ID notifications respectively.
Upon notification this will start the controller in either
peripheral or host mode.
This replaces the handling previously done in the power_supply
set_property() callback for PROP_PRESENT and PROP_USB_OTG. The
usb_psy will be removed in its entirety following this patch.
Change-Id: I22405a0a8da21b4c373895500d8dc4c91d97bc51
Signed-off-by: Jack Pham <jackp@codeaurora.org>
Since msmcobalt RUMI uses QRBTC-V2 UFS PHY, there are a few limitations
that must be applied in order to be able to initialize UFS:
1. UFS should remain in PWM-G1 1-Lane and never change its gear, as other
gears are not stable
2. hibern8 enter/exit should be bypassed
3. we should avoid any power change (as in runtime suspend/resume)
Add "qcom,disable-lpm" property to facilitate disabling of these.
Change-Id: I3f1801da1e2bf1ce8ce98f5ab08211683106ae8c
Signed-off-by: Yaniv Gardi <ygardi@codeaurora.org>
Signed-off-by: Gilad Broner <gbroner@codeaurora.org>
To implement slave side protection, programming of
global registers as well as secure context bank
registers is handed over to TZ. Now, instead of
dynamically allocating context banks, TZ allocates
CBs once in pre defined static manner during boot
and this allocation is maintained throughout the
life of system.
Add an option to enable use of this pre-defined
context bank allocation. We would be reading
through SMR and S2CR registers at run time
to identify CB allocated for a particular sid.
CRs-Fixed: 959535
Change-Id: I782470a2e4d2a66be17ed2b965ba52b7917592f6
Signed-off-by: Susheel Khiani <skhiani@codeaurora.org>
With modification in scheduler, governor now gets predicted
instantaneous demand waiting to run in addition to demand from
previous window for each CPU. Make use of this information since
prediction from scheduler could be more accurate than just looking at
past few windows.
Governor calculates two frequencies during each sampling period: one based
on demand in previous sampling period (f_prev), and the other based on
prediction provided by scheduler (f_pred). Max of both will be selected
as final frequency. Hispeed related logic, including both frequency
selection and delay is ignored when prediction is enabled. If only
f_pred but not f_prev picked policy->max, max_freq_hysteresis period is
not started/extended. This is to reduce power cost of mis-prediction
if it happens.
One use case prediction could dramatically help is when a heavy task
wakes up after sleeping for a long time. With prediction, governor
could ramp up to frequency the task needs much faster than before.
To enable prediction, echo 1 to enable_prediction file in
cpufreq interactive sysfs directory.
Change-Id: I27396785886e43ea01c9000c651c8bd142172273
Suggested-by: Saravana Kannan <skannan@codeaurora.org>
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>
Multiple migrations can happen together within short period if
scheduler is re-arranging a few tasks. In this case, it's only useful
to change frequency at the end of all migrations. Delay handling of
scheduler notification by 1ms.
Change-Id: I9ee7b1e93ce57c28919b5609c40dcde9bd14abed
Suggested-by: Saravana Kannan <skannan@codeaurora.org>
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>
Biasing sync wakee task towards waker CPU's cluster makes sense when the
waker's demand is high enough so the wakee also can take advantage
of high CPU frequency voted because of waker's load. Placing sync wakee
on the low demand waker's CPU can lead placement imbalance which can
lead unnecessary migration.
Introduce a new tunable "sched_big_waker_task_load" that defines the big
waker so scheduler avoid wakee on waker's cluster bias when the waker's
load is below the tunable.
CRs-fixed: 971295
Change-Id: I1550ede0a71ac8c9be74a7daabe164c6a269a3fb
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
[joonwoop@codeaurora.org: fixed a minor conflict in
include/linux/sched/sysctl.h.]
If sync wakee task's demand is small it's worth to place the wakee task
on waker's cluster for better performance in the sense that waker and
wakee are corelated so the wakee should take advantage of waker cluster's
frequency which is voted by the waker along with cache locality benefit.
While biasing towards the waker's cluster we want to avoid the waker CPU
as much as possible as placing the wakee on the waker's CPU can make the
waker got preempted and migrated by load balancer.
Introduce a new tunable 'sched_small_wakee_task_load' that differentiates
eligible small wakee task and place the small wakee tasks on the waker's
cluster.
CRs-fixed: 971295
Change-Id: I96897d9a72a6f63dca4986d9219c2058cd5a7916
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
[joonwoop@codeaurora.org: fixed a minor conflict in
include/linux/sched/sysctl.h.]
If the tasks are run on the higher capacity cluster solely due to the
reason that they can not be be fit in the lower capacity cluster, the
downmigrate threshold prevents the frequent tasks migrations between
the clusters.
Change-Id: I234a23ffd907c2476c94d5f6227dab1bb6c9bebb
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
The current CPU selection algorithm for RT tasks looks for the
least loaded CPU in all clusters. Stop the search at the lowest
possible power cluster based on "sched_restrict_cluster_spill"
sysctl tunable.
Change-Id: I34fdaefea56e0d1b7e7178d800f1bb86aa0ec01c
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
The frequency based inter cluster load balance restrictions are not
reliable as frequency does not provide a good estimate of the CPU's
current load. Replace them with the spill_load and spill_nr_run
based checks.
The higher capacity cluster is restricted from pulling the tasks from
the lower capacity cluster unless all of the lower capacity CPUs are
above spill. This behavior can be controlled by a sysctl tunable and
it is disabled by default (i.e. no load balance restrictions).
Change-Id: I45c09c8adcb61a8a7d4e08beadf2f97f1805fb42
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
[joonwoop@codeaurora.org: fixed merge conflicts due to omitted changes
for CONFIG_SCHED_QHMP.]
This snapshot is taken as of msm-3.18 commit
d5809484b (Merge "msm: ipa: fix race condition
when teardown pipe" )
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
Currently QMP PHY driver expects to have both se_clk and diff_clk
based PHY initialization sequence from devicetree. This change
removes need of both phy_clk_scheme based init sequence as on newer
platform QMP PHY only uses one of phy_clk_scheme.
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
This change adds qcom,phy-clk-scheme mandatory property with QUSB
PHY driver. qcom,phy-clk-scheme property must have "cml" (i.e. DIFF
clock scheme) or "cmos" (i.e. SE clock scheme). Based on this input
qusb phy driver uses required reset and initialization sequence.
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
On newer platform TCSR register based clk_scheme usage is not
available. Hence remove its usage from QUSB and QMP PHY drivers.
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
Enable parsing of device window size from device tree
and calculating the appropriate addressing limitations.
Change-Id: I252a593a74f0cc00e6295a45d4d13db6c79cdfca
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Signed-off-by: Tony Truong <truong@codeaurora.org>
Enable bounce buffering scheme in MHI for the cases
where allocated APQ memory falls outside of the memory range
which the device can access.
Change-Id: I9f40b0dda2f49111b7deb22973e6399fada90094
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Squash and apply the following changes taken from the msm-3.14
kernel branch as of msm-3.14
commit 8139d0b4e7a6d ("ARM: dts: msm: Set flag to manage clks")
commit c24a3df92a457643cc0821eb9e8f392ae5a907ee
Author: Amy Maloche <amaloche@codeaurora.org>
Date: Thu May 9 10:23:41 2013 -0700
input: gen_vkeys: Make y_offset an optional property
Not all targets will need the y coordinate shifted to
function properly, so set this value as default 0.
Change-Id: I1816433c3601fe099ffb8ee275637e573990e432
Signed-off-by: Amy Maloche <amaloche@codeaurora.org>
Documentation/devicetree/bindings/input/gen_vkeys.txt
drivers/input/touchscreen/gen_vkeys.c
2 files changed, 13 insertions(+), 5 deletions(-)
commit bb2ac18f8fab38fa12d8a7d8b7ee80d9c0049329
Author: Amy Maloche <amaloche@codeaurora.org>
Date: Wed Apr 17 12:15:56 2013 -0700
vkeys: gen_vkeys: Add key position offset
Add virtual key position offset to match virtual key
positions with front panel.
Change-Id: Ibbf89e816d9654f202b75470df0c673aa42439c8
Acked-by: Chun Zhang <chunz@qti.qualcomm.com>
Signed-off-by: Amy Maloche <amaloche@codeaurora.org>
Documentation/devicetree/bindings/input/gen_vkeys.txt
drivers/input/touchscreen/gen_vkeys.c
include/linux/input/gen_vkeys.h
3 files changed, 10 insertions(+), 2 deletions(-)
commit 1a6d213cf5a3e40d8b39507e2b010dc81de63630
Author: Mohan Pallaka <mpallaka@codeaurora.org>
Date: Wed Aug 8 11:25:52 2012 +0530
input: Add support for virtual key generation
Virtual keys are used for navigation on Android.
These are not specific to the controller used
in the target but are specific to the target.
Add a module to generate virtual keys independently
of the controller.
Change-Id: I0c86dc77f1bc53c283e990be419c2715edf4e1c0
Signed-off-by: Mohan Pallaka <mpallaka@codeaurora.org>
Signed-off-by: Amy Maloche <amaloche@codeaurora.org>
[stepanm@codeaurora.org: resolve Kconfig conflicts]
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
.../devicetree/bindings/input/gen_vkeys.txt
drivers/input/touchscreen/Kconfig
drivers/input/touchscreen/Makefile
drivers/input/touchscreen/gen_vkeys.c
include/linux/input/gen_vkeys.h
5 files changed, 278 insertions(+)
Change-Id: Ie0e14d201a42632af57ff23dc85cec8881125e5a
Signed-off-by: Alex Sarraf <asarraf@codeaurora.org>
Add USB BAM driver used which allows USB BAM to communicate with other
other peripherals (e.g QDSS or IPA) BAM.
This snapshot is taken as of msm-3.18 commit d5809484bb1b.
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
qpnp-power-on driver have been moved to drivers/input and no
longer present under drivers/platform/msm. Move the DT binding
documentation as well there.
While at it, fix the indentation so that it pass checkpatch.
Change-Id: I32f416d32a57d7c447563d26e4dad24605cdce50
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Device tree bindings documentation for qpnp-revid/coincell are
missing. Add them. These files are taken as a snapshot from
msm-3.18 commit d5809484bb1b (Merge "msm: ipa: fix race condition
when teardown pipe").
Change-Id: I79eeff64e655808414dd23882939bd952e4e279a
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Mutual exclusion between APM switching and LMH register accesses
is only required for HMSS version 1.2 and below on MSM8996. It
is not required for HMSS version 1.2 on MSM8996-Pro. Add support
for MSM8996-Pro so that the LMH mutex is not locked during APM
switching on MSM8996-Pro parts.
Change-Id: If09454827ed12c4d436c2fc792f5adcd45ef4312
Signed-off-by: David Collins <collinsd@codeaurora.org>
Adjust the floor, ceiling, and open-loop voltages for each corner
of each CPR3 regulator based upon aging measurements. This
allows the fixed open-loop voltage adjustment to be reduced since
it no longer has to account for the maximum possible aging
adjustment. This in turn leads to more situations where LDO mode
may be used for the HMSS CPR3 regulators since the LDO must
always operate at the open-loop voltage.
Change-Id: Iaca0ed4b51f258656b5c44dc58f7361814ca3af7
CRs-Fixed: 949622
Signed-off-by: David Collins <collinsd@codeaurora.org>
Add support for the CBF open-loop/closed-loop voltage offset
fuses found on MSM8996-Pro chips. These fuses define independent
open-loop voltages and closed-loop target quotients for the power
cluster and CBF clock which share CPR hardware thread 0. This
independent fusing ensures optimal VDD supply voltage for all
power cluster, performance cluster, CBF corner combinations.
Change-Id: I2e309d683f853f8bd9fd4eb6d12b05c32c7aaf26
CRs-Fixed: 980901
Signed-off-by: David Collins <collinsd@codeaurora.org>
Augment the cpr3-regulator driver to support controllers with full
hardware CPR operation also known as CPR hardening. Also, introduce
the cprh-kbss-regulator driver to handle CPU subsystem specific power
requirements of the msmcobalt chip.
Change-Id: Icac84f9533fa1895ca2466a3793ddaa8b7a4c89c
CRs-Fixed: 967275
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
Voltage boost is a CPR4 hardware feature which raises the VDD supply
voltage when the number of active cores reaches a certain threshold.
It then reduces the voltage back down when the active core count
condition is no longer met. Add support to enable and configure this
feature.
Change-Id: Iccfc2ddddb6621a150235cb2c46adfd1b884dbc2
Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>
Add support for hardware managed per-online-core and per-temperature
voltage adjustment. These adjustment methods may be used together or
independently. The configuration data for these adjustments including
the amount of adjustment for a given corner should be parsed from device
tree. Update the cpr3-regulator driver so that it writes the adjustment
values when enabled into the SDELTA hardware registers.
Change-Id: Idae9018f6a185202d38d210834ca337991fe83d9
Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>
MSM8996-Pro chips contain a fuse which defines the GPU speed bin.
Each speed bin supports a different GPU maximum frequency. Add
support to read this speed bin fuse and use it to parse device
tree properties appropriately.
Change-Id: Ib9b0ba170287ae30802bdb0c64faead8c9bdee8c
Signed-off-by: David Collins <collinsd@codeaurora.org>
The lower Turbo fuse corner reference voltage for speed bin 1
with CPR revision >= 5 only applies to MSM8996v3 chips. It
should not be used on MSM8996-Pro chips. Therefore, add support
to distinguish MSM8996v3 from MSM8996-Pro and add a V3 check
to the reference voltage selection logic.
Change-Id: Iae7d49fe1b2539727160649cbf60ce57b73d639e
Signed-off-by: David Collins <collinsd@codeaurora.org>
Add TTW configuration for PMI8950. Also, add a DT property
(qcom,labibb-ttw-force-lab-on) to keep LAB always-on in TTW mode.
Presently, this property is only required for PMI8950.
CRs-Fixed: 958285 962662
Change-Id: Iec79a6f752067d96fc62a8e9d629c39f4db5ab9f
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Currently, fan53555 regulator driver always registers for
set_suspend_voltage. This force configures the regulator to
set suspend voltage switching to a different voltage selector.
However, this might not be preferred for certain applications.
Add a device tree parameter "fcs,disable-suspend" for the
regulator which when specified will disable suspend voltage
configuration.
CRs-Fixed: 968575
Change-Id: Ib9f450126482e606f3e057857b7a58800583519a
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Halo HL7509 is a digitally programmable buck converter that
outputs a voltage from 600 to 1230 mV from an input voltage of
2.5 to 5.5 V. Since the register mappings are compatible with
FAN53555, add a new vendor ID to support it.
CRs-Fixed: 968575
Change-Id: I0083a7ada311d624731e43755cfd371b2364fb39
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Currently, ESR is being under-estimated when the battery state of
charge (SOC) is less than 2%. Add a change which can do tuning to
use default ESR values when SOC is less than 2% and switch back
to ESR extraction when SOC goes above 2%. When the SOC is greater
than 2% and less than 5%, apply slow settings for ESR pulse. When
the SOC crosses 5%, apply the default settings.
This will allow the SOC to increase more accurately when the FG
starts with a better ESR value. This feature is supported via
device tree property "qcom,esr-pulse-tuning-en".
CRs-Fixed: 953448
Change-Id: I37da8d2a9d795dc3d4daffeaf80a72d188243bfd
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
This devicetree documentation snapshot is taken as of msm-3.18
commit 96a424f00642 (regulator: cpr4: Fix highest voltage corner
open-loop voltage calculation).
Change-Id: I7d65e33e9e501a9175730df676490189effbfd44
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
This devicetree bindings documentation snapshot is taken as of
msm-3.18 commit 96a424f00642 (regulator: cpr4: Fix highest
voltage corner open-loop voltage calculation).
Change-Id: I9b62013a8049c3a22a62b34cd06b87245bcdc5de
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
This devicetree documentation snapshot is taken as of msm-3.18
commit 85b7eb8ac225 ( Merge "ASoC: soc-core: Fix integer
overflow").
Change-Id: I06a15d2668de59db8fca3cae0b69f5d0d3351e05
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
This devicetree bindings documentation snapshot is taken as of
msm-3.18 commit 85b7eb8ac225be (Merge "ASoC: soc-core: Fix
integer overflow").
Change-Id: I50640b74ffe7b3aa29f9f6ca29a012c25c52d157
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Since the following drivers are not present under drivers/power,
remove the DT bindings documentation for them.
Change-Id: I41c08c186b649e21ac376a21632df1414904b1c0
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Add snapshot for Video driver source for MSM targets. The code is
migrated from msm-3.18 kernel at the below commit level -
d5809484bb1bf5864dad2f081b0145224762963a.
Signed-off-by: Arun Menon <avmenon@codeaurora.org>
Add API to get latency for a low power mode with particular
affinity level and reset level. Reset level is level at which
only control logic power collpase happen or both control and
memory logic power collapse happen or Retention state.
The API returns the minum latency out of all clusters in the
particular affinity level and reset level if cluster name is
not passed or the latency of the specific cluster for which
the cluster name is passed.
Change-Id: I2facd9a1fa2dba7e7103d65544537799bd8ba518
Signed-off-by: Srinivas Rao L <lsrao@codeaurora.org>
Conflicts:
arch/arm/boot/dts/qcom/mdm9607-pm.dtsi
arch/arm/boot/dts/qcom/mdm9640-pm.dtsi
arch/arm/boot/dts/qcom/mdmcalifornium-pm.dtsi
arch/arm/boot/dts/qcom/msm8909-pm8909-pm.dtsi
arch/arm/boot/dts/qcom/msm8909-pm8916-pm.dtsi
arch/arm/boot/dts/qcom/msm8937-pm.dtsi
arch/arm/boot/dts/qcom/msm8952-pm.dtsi
arch/arm/boot/dts/qcom/msmgold-pm.dtsi
arch/arm/boot/dts/qcom/msmtitanium-pm.dtsi
This change removes DP DM pulsing functionality related support
from QUSB PHY driver as it is not required.
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
