Add support to read EDID data using the aux channel.
Remove the stored EDID buffer and use the retrieved
EDID data to initialize the DP controller.
CRs-Fixed: 1009284
Change-Id: I93b43be6c2ca50796148898f5210c5b4d13b6f24
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
Validate the codec operations during the HPD process to ensure
that there is no potential null deference. The codec operations
can be invalid if there is no codec registered with the external
display module.
CRs-Fixed: 1009284
Change-Id: I4aa64724a912ae1df07d382d3eb346424b50cf36
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
Size of local PCIe clock frequency buffer should be equivalent to
the max number of clocks possible instead of just the only ones
present. Thus, change the size of this buffer to include optional
clocks that may not be present as well.
Change-Id: I1798cb3af1d2ca362d3b7b14318bb08994670f4c
Signed-off-by: Tony Truong <truong@codeaurora.org>
Define the Silver and Gold cluster OSM look up tables
with the frequencies and data required to support Silver
cluster scaling up to 1.9 GHz and Gold cluster to
2.5 GHz. Also, update the supported frequencies in the msm
and devfreq CPUfreq devices.
CRs-Fixed: 1051857
Change-Id: Id9e9d37c6c0ac5c3ba6f566377bf86dbfe8ccabb
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
Define the CPR corner information for the VDD_APC0 and
VDD_APC1 devices of the msmcobalt v2 chipset. This enables
CPRh closed-loop operation to reduce power consumption by
the voltage rails powering the Silver and Gold clusters.
CRs-Fixed: 1051863
Change-Id: I40b24c00d2c8ec767ba67951b16e7a3c7cdeb511
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
Add support for per-chip revision open-loop fuse reference
voltages. This allows for the correct calculation of open-loop
voltages across msmcobalt chip revisions where the fused
reference voltages vary. Lastly, update the compatible string for
existing msmcobalt v1 CPR APC devices.
CRs-Fixed: 1051863
Change-Id: Icff31b265b49d087005ac0e58d7783ff2588548c
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
Make hdcp 1.x interrupt handling generic for any supported interface.
Add Display-Port interrupt related data and handle interrupts in
ISR. Do this dynamically based on which interface is connected like
HDMI or DP.
Change-Id: I8be206dbc53fd7c757f244dc544241f1d8e1dd1c
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Hookup sink's aux addresses for data read and write to be used
for hdcp 1.3 authentication so that hdcp 1.3 state machine can
dynamically select sink addresses for different interfaces.
Change-Id: I4ef01c7bdb9af770ea3014bd6e63d3c17b0cfa47
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Add HDCP 1.x related registers to be hooked up with
hdcp 1.x state machine so that hdcp 1.x can be programmed
to work for DP.
Change-Id: I16bf5ecbc237294e99ce6710c6b759e3346011a5
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Create a register set for a given interface and make
hdcp state machine independent of the interface being
used to support multiple interfaces with different
register sets.
Change-Id: I62738697e91549fe44ef09b0a3aa905b37c00389
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
This reverts commit 2dae58c4af ("arm64: fpsimd: Enable
FP(floating-point) settings for msm8996").
Feature is not applicable to msmcobalt and only applicable
to MSM8996.
CRs-Fixed: 1054373
Change-Id: I8f21787f0a45dd9f7be8986b4f332f498add3203
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
This reverts commit 1f7d497b0a ("arm64: fpsimd: add support to
enable/disable fpsimd_settings.").
Feature is not applicable to msmcobalt and only applicable
to MSM8996.
CRs-Fixed: 1054373
Change-Id: I8d11c596d61f0435f4ee2d1007f4903843650aed
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
This reverts commit 8df2feee09 ("defconfig: arm64: Enable
FP settings for msm8996").
Feature is not applicable to msmcobalt and only applicable
to MSM8996.
CRs-Fixed: 1054373
Change-Id: I0d2c9bc8f27c2ac938754ab97b4bdc7feb6325b1
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
This reverts commit 7ab05c20ad ("arm64: Add support
for app specific settings").
Feature is not applicable to msmcobalt and only applicable
to MSM8996.
CRs-Fixed: 1054373
Change-Id: I12d3a22362b965c7d302976c83ab0e757c98d3c6
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
This reverts commit fa5a089eb6 ("defconfig: arm64: Enable app
specific setting on MSM8996").
Feature is not applicable to msmcobalt and only applicable
to MSM8996.
CRs-Fixed: 1054373
Change-Id: I9464305f6cac6aedb3e5763979dba4cba92e050b
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
For msmcobalt, it was found that, for low-latency audio
playback, audio driver requests for a PM QoS with 10% of
the period size. This value is too small for CPU to
come back up from L2 PC, and hence CPU never enters into
L2 PC, which increased power consumption.
ALSA core framework already has a way to vote on behalf of
client driver, with a latency value of 75% of period size.
To enable CPU to enter L2 PC, fall back to use ALSA
core provided PM QoS of 75% for low-latency audio playback
instead of the custom PM QoS request.
CRs-Fixed: 1048743
Change-Id: Icff3c15a4f1d26f43274465063259f06737fe495
Signed-off-by: Banajit Goswami <bgoswami@codeaurora.org>
Renable GIC_V3_ACL on msmcobalt-perf defconfig to disable ITS
support.
CRs-Fixed: 1054447
Change-Id: Ia0bd3026025c1215c595219a19cc164bc3758363
Signed-off-by: Runmin Wang <runminw@codeaurora.org>
ICNSS uses SMMU which requires aggre2_noc_clk. Hence vote
on aggre2noc clock through bus bandwidth.
CRs-Fixed: 1053538
Change-Id: I5e300cf81bd8b653e9a5611ed60b2b770e94a863
Signed-off-by: Yuanyuan Liu <yuanliu@codeaurora.org>
for printing kernel pointers which should be hidden from unprivileged
users, use %pK which evaluates whether kptr_restrict is set.
CRs-Fixed: 987021
Change-Id: Ie49eee9478f4657cfb2a994ba60da1ec4c356339
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
Add support to allocate/reserve a virtual address range without
physically backing. Add support to allocate physically backing memory
without assigning it a virtual address. Add support to unite
the two forementioned allocations together. Add support to
divorce them from one another. Add support to let their kids
do cache operations as they see fit.
Create a 'dummy' page that is used to back virtual allocations
that are not yet backed by physical memory.
CRs-Fixed: 1046456
Change-Id: Ifaa687b036eeab22ab4cf0238abdfbe7b2311ed3
Signed-off-by: Carter Cooper <ccooper@codeaurora.org>
Signed-off-by: Tarun Karra <tkarra@codeaurora.org>
Memory barrier is required after the reset is asserted and de-asserted, so
add the same.
Change-Id: I17532984f546be97ba9862c07dd694b3fdd592fb
Signed-off-by: Taniya Das <tdas@codeaurora.org>
In soundwire read/write commands, register value is defined
as 8 bit but it is accessed through 32 bit pointer which
may cause out of boundary memory access. Fix this issue by
typecast appropriately.
BUG: KASan: out of bounds access in swrm_read+0x1dc/0x30c at
addr ffffffc089871880
Write of size 4 by task kworker/u8:5/236
==addr ffffffc089871880
[<ffffffc00081d174>] swrm_read+0x1d8/0x30c
[<ffffffc000819808>] swr_read+0x5c/0x74
[<ffffffc000741e58>] regmap_swr_read+0xd8/0x11c
[<ffffffc00073a350>] _regmap_raw_read+0x210/0x314
[<ffffffc00073a4b0>] _regmap_bus_read+0x5c/0xb4
[<ffffffc000739548>] _regmap_read+0xe0/0x1ec
[<ffffffc0007396b8>] regmap_read+0x64/0xa8
[<ffffffc000dc9dd4>] snd_soc_component_read+0x34/0x70
[<ffffffc000dc9f44>] snd_soc_read+0x6c/0x94
Memory state around the buggy address:
ffffffc089871780: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc
ffffffc089871800: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc
Change-Id: I3c56dffb4ca197e8fc23d54a44282a60254dd001
Signed-off-by: Vidyakumar Athota <vathota@codeaurora.org>
Use the exclude_idle attribute of the perf events to avoid reading
PMUs of idle CPUs. The counter values are updated when CPU enters
idle and the saved value is returned when the idle CPU is queried
for that event provided the attribute is set in the perf_event.
Change-Id: I61f7a7474856abf67ac6dfd9e531702072e108a5
Signed-off-by: Patrick Fay <pfay@codeaurora.org>
Current code doesn't restart perf after hotplug and power collapse
which makes monitoring in low power modes difficult. This patch adds
support for the hotplug notifier events and creates a common path for
the power collapse and hotplug events.
Change-Id: I52e6978b1c104fd78bc42e4600ceb111b47b3e11
Signed-off-by: Patrick Fay <pfay@codeaurora.org>
