Much of the sequence to scale up to HS400 is not required when
enhanced strobe mode for HS400 is supported. Handle scale up
to HS400 appropriately in this case.
Change-Id: I733f98bdb99e54d6cd3a074fcece2c89aaaee12f
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
The 8-bit bus width needs to be set first before switching to
DDR bus width when entering HS400 in enhanced strobe mode.
Also use the mmc_select_bus_width() for doing this instead of
rewriting portion of that code.
Change-Id: If9bec799de77714d7183c812a0ba04a9a4ac48f5
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
[subhashj@codeaurora.org: fixed trivial merge conflicts]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Some hosts may need additional steps to get HS400 functional in
enhanced strobe mode. Add host ops to facilitate that.
Change-Id: I9663830e7ccedf8bf7970d0724a4c7ce212073fd
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
[subhashj@codeaurora.org: fixed trivial merge conflicts]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Enhance Strobe is defined in v5.1 eMMC spec. This commit
is to implement it.
Normal Strobe signal for HS400 is only provided during
Data Out and CRC Response. While Enhance Strobe is enabled,
Strobe signal is provided during Data Out, CRC Response and
CMD Response.
While enabling Enhance Strobe, the initialization of HS400
does not need enabling HS200 and executing tuning anymore.
This simplifies the HS400 initialization process much.
Per spec, there is a STROBE_SUPPORT added in EXT_CSD register
to indicate that card supports Enhance Strobe or not. If it is
supported, host can enable this feature by enabling the most
significant bit of BUS_WIDTH before set HS_TIMING to HS400.
Change-Id: I1003352cb31dfaec01fde352da7b879a13c94b3f
Signed-off-by: Yi Sun <yi.y.sun@intel.com>
[venkatg@codeaurora.org: Fix minor conflicts & compilation failure]
Patch-mainline: linux-mmc @ 06/04/15, 19:50
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
[subhashj@codeaurora.org: fixed trivial merge conflicts]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
The vendor specific func register doesn't get reset when using the
software reset register. The various bootloader's could leave this
in an unknown state, hence reset this register to it's power on reset
value during probe.
Change-Id: I3258eedf87b1bc945f43b85627948e6c92b74686
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
mmc_host_clk_hold/release pair should be added for relevant
cmdq_ops. Since it enables host->clock which is needed
for register access as well (apart from
MCLK).
Change-Id: I6d9d15a421225c5b4179cb19e467a17d01ad176f
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Signed-off-by: Talel Shenhar <tatias@codeaurora.org>
Tracepoint measures time that takes runtime suspend, suspending crypto
engine time included into measurement.
Change-Id: I6108a9dc5b188e2086aa5e6d2fe87414bb2a2539
Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
Since error handling could race with runtime suspend, increase usage_count
for the card device will prevent this race.
Change-Id: Ie95a3c631f519c7993b0032f0b674871b64e4cb6
Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
There are three cases, request should not be pulled from the queue:
- it is dcmd request, while dcmd request is in progress
- the CQE is halted, but not because of the runtime suspend
- the cmdq is in error state
When the card is suspended, the CQE is halted. New request coming should
be pulled from the request queue and the runtime resume will be triggered
by mmc_get_card(). There is no race between the pulling request condition
and the runtime suspend flow, because the card marked as suspended after
the CQE is halted.
Change-Id: I126ae689f7fea2e7545dfda7c4c6abda286a0f11
Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
After halting the CQE, an unexpected legacy irq may be received by the
controller. The post halt helper function acknowledges this irq and
handles it.
Change-Id: Iaaa4e57fba830d626fad693ff33dd966994bc50f
Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
To execute legacy SDHCi suspend/resume flow, CQE should be halted, because
suspend flow uses legacy SDHCi commands (cmd6 flush and cmd5 sleep)
commands.
On resume, there is full card initialization and both the card and the
controller will be in CQ mode after resume. Still need to update CQE state
by cleaning halt bit.
This change implemented in helpers, that are used by both system and
runtime suspend/resume callbacks.
Change-Id: I2ae9b19e2cbde04366e7ecf06377a5efd81e3f26
Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
[subhashj@codeaurora.org: fixed trivial merge conflicts]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Access to the registers of CQE HCI wrapped by increment/decrement of pm
core usage counter for the platform device.
Change-Id: I9da4aa7d28dbf8e1d2bf62f6d5fa0875bd5b6064
Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
After the CQE halt on some controllers need additional actions, before
wakeup of waiting thread.
Change-Id: I742baa48eb3f6eccf782d77a03aafe16ab7188f1
Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
When enabling cmdq mode for the first time, need to allocate descriptors
table. After controller reset and enabling cmdq next time, still need to
update CQTDLBA and CQTDLBAU registers with already allocated descriptors
table (desc_dma_base).
Change-Id: Ide89eebbce5a193cd44a1ea4ec65403f98e2a7ab
Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
eMMC cache barrier provides a way to perform delayed
and in-order flushing of cached data. Host can use this
to avoid flushing delays but still maintain the order
between the data requests in cache.
In case the device gets more barrier requests than it
supports, then a barrier request is treated as a normal flush
request in the device.
If the eMMC cache flushing policy is set to 1, then the device
inherently flushes all the cached requests in FIFO order. For such
devices, as per spec, it is redundant to send any barrier requests
to the device. This may add unnecessary overhead to both host and
the device. So make sure to not send barrier requests in such cases.
Change-Id: Ia7af316800a6895942d3cabcd64600d56fab25a6
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
[subhashj@codeaurora.org: fixed trivial merge conflicts]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Enable clock gating for cmdq by adding respective
API to clk hold/release. CMDQ also uses the same
legacy clock gating API.
Change-Id: I3d4f28cedb24ff2292ab08bdd7470358cf134dd5
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
MMC_SDHCI_MSM_ICE is enabled only if MMC_SDHCI_MSM config
is enabled. Reorder this so that it shows up appropriately
in the kernel config menu.
Change-Id: Ic6af2979e7c8c56841d509f3f25fadd4dd2fe9d2
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
[subhashj@codeaurora.org: fixed trivial merge conflicts]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
The platform host has been initialized and should be freed
in case we defer the probe.
Change-Id: Iadce572fa4618b18f2fadf9e00812e75144af1c9
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
CMDQ is not supported for RPMB partition. Hence, for RPMB requests
the controller is kept in HALT state and then CMDQ is disabled in
the card.
Change-Id: I1242841d5fa063b542e35dcff95694ef5e88737a
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Discard is supported in CMDQ mode only when device queue is empty.
Hence, discard commands should be sent using DCMD slot with
QBR (Queue Barrier) flag set.
Change-Id: I630091cbd94ffcdcec71626257f912c15fd2e21e
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
[subhashj@codeaurora.org: fixed trivial merge conflicts]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
This will be needed by core layers to check the status for
CMD13 that is sent in CMDQ mode.
Change-Id: If3d062bad4cf87c2543e6d5345f9ab6a0afa23bf
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
This change adds UHS cards to mmc_sd_get_max_clock() API.
Cards that support UHS can set timing of SDR104 which
supports frequency up to 208Mhz.
Change-Id: I25bcb35aa2cecd98f6f04cd98a616a76c75b6784
Signed-off-by: Talel Shenhar <tatias@codeaurora.org>
Add changes to configure ICE for data encryption/decryption
using CMDQ.
Change-Id: I9a10d18d617102916526e994e9f9d22d2aa5446b
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
The response type and command timing for busy commands are
set incorrectly due to wrong cmd->flags check. Correct this
to check for MMC_RSP_BUSY flag.
Change-Id: I4498c302914a81bf19f61d20b30bd4426e21d3d0
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
In CMDQ, the mmc_release_host runs in softirq context.
There's a potential race condition between show/set_perf
since it doesn't disable pre-emption. Change this to
disable preemption.
Change-Id: I20918a459e8b35ac666971b8ebf179f44aa9c40f
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
Requests can still be issued when dcmd is in progress.
Only when discard is in progress, should the requests not
be issued.
Change-Id: Ief70cf2f86e9eb3817f8a390626be8433180ed87
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
During the shutdown process,
- Stop the queue
- Flush all the pending requests
- Halt the Controller
- Put the card in legacy mode
Change-Id: I5fe4e998bc04bfd8f50de63f3beae3cb25f1c8ba
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
Dump out testbus values till 60. This would facilitate
triaging command-queue issues.
Change-Id: Icac865629b21ce0207c46c1907cf25401d6e8339
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Individual requests can have timeouts defined. The default
timeout is set to 120 seconds. On a timeout, the block layer
notifies the driver and error can be handled thereafter.
Change-Id: Ifcd690411770ab266c12a01bb0993f92b0f18bc6
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
eMMC controller detects error, generates error interrupt and
notifies the CQE. Hence, parse the correct error and propagate
it to CQE handler for further processing.
Command queue interrupt handler may return IRQ_NONE
or IRQ_HANDLED. Check for the return value and either
proceed or return from handler.
Change-Id: I29c7b22848d3d728a79ba215f8d2f594d19fba63
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
On error, the CMDQ engine stops processing requests. It is then
halted and error handled.
The error have been categorized as below:
1. Command error
a. time-out
- invalidate all pending tags & requeue
- reset both card & controller
b. crc
- end the error mrq
- tune
- unhalt
2. Data error
a. time-out
- invalidate all pending tags & requeue
- reset both card and controller
b. crc
- end the error mrq
- tune
- unhalt
3. RED error
This is device specific error and is not recoverable.
The card and controller are reset in this case and all
pending tags are invalidated and requeued.
Change-Id: I791d05f6b31d8f9b35a56fe85007b320c14e8b46
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
[subhashj@codeaurora.org: fixed trivial merge conflicts]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
There could be a switch of partition while RPMB access.
RPMB thread would then hand-off the control to mmc-cmdq-thread
in the following state:
- partition set to RPMB in card
- CMDQ mode disabled in card
- Controller in halt state
When the next request is received, the following has to be done
- switch partition to the current partition
- enable CMDQ in card
- unhalt controller
Change-Id: I9eca350572fd88476dfee9642696a223c5cd7ada
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
[subhashj@codeaurora.org: fixed compilation error]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
There is a hardware ring-buffer that logs the commands
sent and doorbells rung. This is helpful for debugging
in case of errors. This requires that the testbus be
enabled. Hence don't disable testbus.
Change-Id: I9c2fa984740aa9a0f8135d2196be6b3639ec22d1
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
Adds support for command-queue (CQ).
MSM driver supports CQ in the hardware. The controller
can send commands to the card and read statuses from the
device. This patch adds support for the same.
Change-Id: I1b19a2ce4c124c96dc6c3852d8f58ad076851f4b
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
Halt can be used in error cases to get control of the
bus. This is used to remove a task from device queue
and/or other recovery mechanisms.
Change-Id: I4ada286aefe57b90bfd20d60f8fbe2c013d9db71
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
Halt is a controller feature that can change the controller mode
from command-queue to legacy. This feature is very helpful in
error cases.
Change-Id: I7f1465b609afed68886256bd605d4019716964f4
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
This patch adds CMDQ support for command-queue compatible
hosts.
Command queue is added in eMMC-5.1 specification. This
enables the controller to process upto 32 requests at
a time.
Change-Id: I0486495ef57c64bf8427e917daeb184c69b8dc73
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Signed-off-by: Sujit Reddy Thumma <sthumma@codeaurora.org>
Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
[subhashj@codeaurora.org: fixed trivial merge conflicts]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Adds flush request support to command-queue. This uses DCMD
feature of the controller for sending commands in
command-queue mode. DCMD is a direct command feature that uses
a pre-configured slot for sending commands other than Class 11.
Change-Id: Iebf6b74173dc91b0dc7230d1e87c65983d15148e
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
[subhashj@codeaurora.org: fixed trivial merge conflicts]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Command queueing is defined in eMMC-5.1. It is designed for
higher performance by ensuring upto 32 requests to be serviced
at a time.
Adds read/write support for CMDQ enabled devices.
Change-Id: I136ddea8e5ca57eb4f85ca6e72c60001a7e24f78
Signed-off-by: Sujit Reddy Thumma <sthumma@codeaurora.org>
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
[subhashj@codeaurora.org: fixed trivial merge conflicts]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Command Queueing (CQ) feature is introduced to eMMC
standard in revision 5.1. CQ includes new commands
for issuing tasks to the device, for ordering the
execution of previously issued tasks and for
additional task management functions.
This patch adds initialization and enabling of command
queue in the card and controller. If the card and the
controller support CQ, then it is enabled.
Change-Id: I92d893d1503396d4b00848813cc546fc263e77fd
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
[subhashj@codeaurora.org: fixed trivial merge conflicts]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Command Queueing (CQ) feature is introduced to eMMC
standard in revision 5.1. CQ includes new commands
for issuing tasks to the device, for ordering the
execution of previously issued tasks and for
additional task management functions.
The idea is to keep the legacy and CQ code as discrete
as possible. Hence, a separate queue is created for CQ.
The issuing path is non-blocking since several requests
(max. 32) can be queued at a time.
Change-Id: I5b48d1b3ed17585b907ec70ff7c8d583003ec9e1
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
[subhashj@codeaurora.org: fixed trivial merge conflicts & compilation
error]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
This patch adds ICE support to sdhci driver. It uses the
new ICE host->ops like config/reset to configure/reset the
ICE HW as appropriate.
Change-Id: I64946d15d2f6ec8981e95c8817e82a2115b1196c
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
[subhashj@codeaurora.org: fixed trivial merge conflicts]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Add ICE support to low-level driver sdhci-msm.c. This code is
primarily responsible for enabling ICE (if present),
managing ICE clocks, managing ICE suspend/resume and also provides
a few host->ops for sdhci driver to use ICE functionality.
Change-Id: I3ec62146982c9db0263d5e19f60274163f514859
Signed-off-by: Krishna Konda <kkonda@codeaurora.org>
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
[subhashj@codeaurora.org: fixed trivial merge conflicts]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
eMMC controller may have an Inline Crypto Engine (ICE) attached,
which can be used to encrypt/decrypt data going to/from eMMC.
This patch adds a new client driver sdhci-msm-ice.c which interacts
with ICE driver present in (drivers/crypto/msm/) and thus provides
an interface to the low-level SDHCI driver to do the data
encryption/decryption.
Change-Id: I6ac78072563f77c481425a5ec149ec46a9b0a80d
Signed-off-by: Krishna Konda <kkonda@codeaurora.org>
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
[subhashj@codeaurora.org: fixed trivial merge conflicts]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
On the 3.10 kernel branch we had an implementation
supporting HS400 that was different than that in the
Linux community code base.
As part of the transition to kernel 3.14, the
community's implementation was used.
However, as this implementation does not properly
support up/down clock scaling - this patch adds
the missing functionality.
Change-Id: I096132bc715909b1ff2ac84448ec0adb32ca06ba
Signed-off-by: Talel Shenhar <tatias@codeaurora.org>
