Commit graph

577836 commits

Author SHA1 Message Date
Linux Build Service Account
13840c574e Merge "msm: ipa: Add support to configure WAN RX desc size" 2016-11-10 15:14:19 -08:00
Linux Build Service Account
4dfa75b604 Merge "ARM: dts: msm: Disable lpm sleep modes for msmfalcon" 2016-11-10 15:14:16 -08:00
Veera Sundaram Sankaran
97d7b831de msm: mdss: fix race condition with overlay off in doze mode
When stop is called for doze mode, there is a race condition
between the stop thread and the retire signal work queue.
Fix race condition by making sure that driver waits for the
retire fence before calling the stop.

Change-Id: Icd9d5b14e4138e747f9483458da7ddb89f515c03
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2016-11-10 15:03:22 -08:00
Olav Haugan
45b8775b62 sched/core: Fix migrate tasks bail-out condition
Migrate tasks function is used by both hotplug and cpu isolation. During
hotplug all the cpus are stalled (in stop machine) while tasks are being
migrated. However, this is not the case during cpu isolation. A task
that was counted as a pinned thread might have been migrated off the
cpu. Take this into account when checking whether we have completed
moving all tasks off the runqueue.

Also ignore warning about tasks moving off the run-queue for isolation
use case.

Change-Id: I5c5f25eb9b1eaf0605b606a65e0ac86996fa5f27
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
2016-11-10 14:19:05 -08:00
Olav Haugan
c82e2f73d1 core_ctl: Synchronize access to cluster cpu list
Cluster cpu list traversal is not properly protected against removal of
element by a separate thread. Add proper locking to ensure an element
cannot be removed while accessing the list.

In addition ensure we don't end up in a livelock never exiting the loop
due to hotplug continuously moving elements to the end of the list.

Change-Id: Ie98fe48c2f4fdd0244573229b77ee9823df9e214
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
2016-11-10 14:19:00 -08:00
Sungjun Park
6eaec59433 ARM: dts: msm: Fix BT current leakage in msmcobalt MTP and CDP
There is a current leakage on S5 and LDO XO RF rail during
BT sleep. To prevent the current leakage, L7A/L17A/L25A
should be on during BT sleep. So, change L7A/L17A/L25A LDOs
from pin control version to SW control not to follow HW_EN2.
RFCLK2 has not been turned off during sleep and caused
extra current penalty. For RFCLK2 to follow HW_EN2 pin control,
clk_rf_clk2_pin should be used.

Change-Id: Ie316941535f62afd75eac21280061b489e9196c1
Signed-off-by: Sungjun Park <sjpark@codeaurora.org>
2016-11-10 14:09:34 -08:00
Subbaraman Narayanamurthy
361a315fe3 qpnp-fg-gen3: Fix empty SOC handling
Currently, a flag is set when the empty SOC interrupt fires to
indicate SOC 0 to the users. This is not cleared when the battery
voltage goes up. This needs to be fixed. Remove the flag and use
the realtime status of BATT_SOC peripheral to decide it. To make
that even more robust, validate the battery voltage with the
cutoff voltage. While at it, add a print in the driver's probe to
print the battery SOC and voltage. This will be helpful to debug
different battery charging scenarios.

CRs-Fixed: 1086715
Change-Id: Icbbe0d4ab74c6f9bf6f2278a11020a9bc6c41930
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
2016-11-10 12:14:50 -08:00
Hemant Kumar
49ba0d0ad4 usb: core: Add support to skip extended bus resume delay
By default skip_extended_resume_delay module parameter
allows to skip extra 40ms delay upon usb bus resume.
This delay was added on top of host bus resume which
is driven for 20ms. Skipping extra delay reduces over
all bus resume latency.

Change-Id: I31a83abc057c345f29d204a63e7571b880678e69
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
2016-11-10 11:14:27 -08:00
Hemant Kumar
286fd3fcbf usb: core: Replace msleep with usleep_range
Since usleep_range provides better accuracy in
comparison to msleep. This helps in reducing
the latency of host bus resume.

Change-Id: Ie8d5231327fcc27ab2a28542e0d96687abb9aace
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
2016-11-10 11:14:26 -08:00
Derek Chen
c8c289d328 ASoC: msm: qdsp6v2: add support for tx app type config
Add support for TX path COPP calibration according to
app type configuration

CRs-fixed: 1015476
Change-Id: I0bcbfadb0c1a22529863a5c4b8cc5c53a1028915
Signed-off-by: Derek Chen <chenche@codeaurora.org>
2016-11-10 08:05:08 -08:00
Sarada Prasanna Garnayak
67383dc424 defconfig: enable QCOM_IRQ_HELPER for 32bit msmcobalt and msmfalcon
Fix the wlan host driver compilation error for the msmcobalt and msmfalcon
32 bit target. Enable QCOM_IRQ_HELPER config flag to expose IRQ balancer
APIs for msmcobalt and msmfalcon 32bit target.

CRs-Fixed: 1088388
Change-Id: Ieb72bd3779c3b9a372b469f3f7f571fc22294099
Signed-off-by: Sarada Prasanna Garnayak <sgarna@codeaurora.org>
2016-11-10 07:37:51 -08:00
Praneeth Paladugu
35f6387feb msm: vidc: Allocate raw packet memory one time
Today raw packet allocation is done every time when driver
is processing HW responses. For some reasons in system,
if this allocation takes long time, forward threads may
timeout. Hence allocate this memory one time and use it
while processing responses.

CRs-Fixed: 1086284
Change-Id: I1cca3f4cef34abd36b095b7ee0f32333c88fb939
Signed-off-by: Praneeth Paladugu <ppaladug@codeaurora.org>
2016-11-10 07:09:33 -08:00
Dhoat Harpal
6998b685f2 soc: qcom: glink: Fix incorrect call to deinit function
In function glink_core_register_transport, deinit function for qos
configuration is called before initializing qos configuration.

Call to glink_core_deinit_xprt_qos_cfg function is removed.

CRs-Fixed: 1088375
Change-Id: Ifffab071efed56541e763e4f6f51aa45d7a6678b
Signed-off-by: Dhoat Harpal <hdhoat@codeaurora.org>
2016-11-10 20:24:36 +05:30
Shiraz Hashim
adcf23cfd5 arm: dma-mapping: page align size before flush tlb
start and end must be page aligned while calling
flush_tlb_kernel_range else the last page may get
missed while invalidation.

Change-Id: Ibaab202c47a475623e197a13191b2fed638ce20b
Signed-off-by: Shiraz Hashim <shashim@codeaurora.org>
2016-11-10 04:32:42 -08:00
cyizhao
73ab722dc6 ARM: dts: msm: Add battery profile for FG in QRD interposer msmcobalt
Add battery profile for QRD interposer msmcobalt to
make sure FG could load it and work as expected.

CRs-Fixed: 1086571
Change-Id: I6ca20cbd29b9a7bd45a78321ea0f65b74450e8c1
Signed-off-by: cyizhao <cyizhao@codeaurora.org>
2016-11-10 19:56:44 +08:00
Wei Ding
4764fd0d2f ARM: dts: msm: Correct camera dtsi place for msmcobalt skuk device
Correct the camera dtis place to support multiple chipset
version for msmcobalt skuk device.

Change-Id: I20e12bc1597ad15cb3dc9c3ef18d81d039931e07
Signed-off-by: Wei Ding <weiding@codeaurora.org>
2016-11-10 19:23:22 +08:00
Utkarsh Saxena
e2fe16ac45 msm: ipa: Address overlap fix
No need to assert and return fault on
address overlap with respect to SMMU
enabled case.

Address overlap does not cause any
functional failure.

Change-Id: I5b0faa6e021f2463635e13625072e159ba558907
Acked-by: Mohammed Javid <mjavid@qti.qualcomm.com>
Signed-off-by: Utkarsh Saxena <usaxena@codeaurora.org>
2016-11-10 16:33:13 +05:30
Manoj Prabhu B
88a8c0ce10 memshare: Pass device structure to ramdump driver
The ramdump driver uses the device pointer during ramdump read.
This change passes in the device pointer for memshare during
ramdump create and moves the call to the probe function.

CRs-Fixed: 1079523
Change-Id: I687696dbedfa0ce7e6053d70291a7beb6f81f82e
Signed-off-by: Manoj Prabhu B <bmanoj@codeaurora.org>
2016-11-10 14:53:20 +05:30
Taniya Das
d5540f87db ARM: dts: msm: Update clock gcc node for MSMfalcon/Triton
Modify the clock_gcc dummy clock to use the real clock controller for all
global clock controller clients.

Change-Id: Iac989d3c9312654b599d8299206e5478ca454861
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2016-11-10 14:17:04 +05:30
Abinaya P
d9a48a7cd2 Revert "input: touchscreen: Add synaptics v1 driver"
This reverts  'commit d13776d16a ("input: touchscreen: Add synaptics
v1 driver")'

Change-Id: I1c0c57de3319c59c094b9e8d9192995312192354
Signed-off-by: Abinaya P <abinayap@codeaurora.org>
2016-11-10 00:42:14 -08:00
Gaurav Kohli
d46e24b1fb ARM: dts: msm: Add IMEM pil entry for msmtriton
Add IMEM PIL entry to save relocatable address of images
loaded by PIL.

Change-Id: Ie09c8ae431cc7da4c8cd745d9c6d018e6a256158
Signed-off-by: Gaurav Kohli <gkohli@codeaurora.org>
2016-11-10 00:25:33 -08:00
Gaurav Kohli
04d3e804c6 ARM: dts: msm: Add IMEM pil entry for msmfalcon
Add IMEM PIL entry to save relocatable address of images
loaded by PIL.

Change-Id: I79acd047c7e414ed19a2f992f8ff801b63c8a2ad
Signed-off-by: Gaurav Kohli <gkohli@codeaurora.org>
2016-11-10 00:25:06 -08:00
Abinaya P
04e7c994ca Revert "input: touchscreen: synaptics v1.1"
This reverts 'commit 7112993181 ("input: touchscreen: synaptics v1.1")'
This change is not needed in 4.4 kernel.

Change-Id: I89ab8f353bc04bc0a04d5f5a6993e8e8e5ebbd2e
Signed-off-by: Abinaya P <abinayap@codeaurora.org>
Signed-off-by: Shantanu Jain <shjain@codeaurora.org>
2016-11-10 12:40:32 +05:30
Harry Yang
87bdf22ad7 qcom-charger: smblib: lower delay in OTG soft-start check
Currently, there is a delay of 20msec before raising OTG
current limit, which may be too long for some OTG devices and
cause unexpected issues.

Change it to 1ms or 2ms per HW timing.

Change-Id: Ie09a65e7974e2412af4add3b6f1e0aa20ee4a34b
Signed-off-by: Harry Yang <harryy@codeaurora.org>
2016-11-09 23:01:53 -08:00
Amit Nischal
6278f25f01 clk: qcom: Add support to initialize & handle dynamic update for alpha plls
Add support to do initial configuration for alpha plls and votable
alpha PLLs need to have the fsm mode enabled as part of the
initialization using flag 'SUPPORTS_FSM_MODE'.

Alpha PLLs can support two kinds of input signals, normal and latched.
The normal input is directly passed to the core, while the latched input
requires a latch and acknowledge sequence to be performed for the
changed input to propagate.

Alpha PLLs can support dynamic update with both kind of input signals.
The ones which support this using a latched interface however need to
follow the latch/wait-for-ack sequence to be performed when the rate
changes. Mark these with a new flag 'SUPPORTS_DYNAMIC_UPDATE' to handle
this as part of clk_alpha_pll_set_rate().

PLLs could require post div to be set at runtime, add a vco_data which
could be used for these settings.

Change-Id: Ia0b9a2a52a3b33b7b68409c19c460d717eb5c1e2
Signed-off-by: Amit Nischal <anischal@codeaurora.org>
2016-11-10 10:06:47 +05:30
Asutosh Das
d9ad202490 scsi: ufs: error out all issued requests after shutdown
After PON (power-off notification) is sent, no requests
should be issued to the driver.
This change errors out all requests except from shutdown
context after shutdown is initiated.

Change-Id: Id499abc27303bfed72fab4d61abb872bad7d9043
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
2016-11-10 09:50:17 +05:30
Subbaraman Narayanamurthy
08cbd79f44 regulator: qpnp-labibb: add support to configure PFM for LAB regulator
As per the hardware documentation, PFM needs to be disabled for
LAB regulator during slow start. When the display is turned off,
PFM needs to be disabled with the default current limit. When the
display is turned on, after VREG_OK interrupt fires, PFM needs to
be enabled after overriding the current limit. Add support for
it. Currently this is required only for pmicobalt.

While at it, fix the current limit configuration for LAB
regulator.

CRs-Fixed: 1024407
Change-Id: Icb3781ca31dd8474cfca077c52593dc69d011127
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
2016-11-09 20:03:44 -08:00
Subbaraman Narayanamurthy
83dd0b0ca0 ARM: dts: msm: Change LAB precharge time to 500us in pmicobalt
Set LAB's precharge time to max 500us to optimize the precharge
behavior as suggested in the hardware documentation.

CRs-Fixed: 1084297
Change-Id: I118f4254686caf498087847916b7710662ab31e7
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
2016-11-09 20:03:44 -08:00
Subbaraman Narayanamurthy
bcac9ef54a regulator: qpnp-labibb: Rename properties to reflect the vendor
Currently, some properties in LABIBB regulator driver are having
prefix "qpnp" which is not reflecting the vendor. Change it to
"qcom" to reflect the vendor name correctly and also match with
other DT properties.

CRs-Fixed: 1071971
Change-Id: I182dddc29f3d7c7b449b56ac7fb84e74061cf3a4
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
2016-11-09 20:03:44 -08:00
Subbaraman Narayanamurthy
06a15ee5c4 regulator: labibb: configure LCD/AMOLED mode and SWIRE control selectively
For LABIBB peripherals in pmicobalt, bootloader configures
LCD/AMOLED mode and SWIRE control based on a GPIO selector.
Hence, add support to configure them selectively.

While at it, fix the variable name used in read/write APIs to
reflect the address rather than base. Also use the pmic subtype
macros from qpnp-revid.h directly.

CRs-Fixed: 1071971
Change-Id: Ibbf3d432709eadf0808e062726804be6b2a065ee
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
2016-11-09 20:03:43 -08:00
Hareesh Gundu
87cdd9228c ARM: dts: msm: Add GPU mempools properties for all msm
Add initial set of configuration for GPU mempools
to reserve page pools at init time of kgsl driver.

CRs-Fixed: 1064046
Change-Id: Ie6789e13be7316a0de43538b9e477920fa64c6bb
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
2016-11-09 19:46:04 -08:00
Dhanalakshmi Siddani
e27a72cc03 ASoC: wcd9335: Add 24bit record support
Update tasha DAI for 24bit record support.

CRs-Fixed: 1084375
Change-Id: I6d04b6343713a91d97ff18631141772f92f4ed00
Signed-off-by: Dhanalakshmi Siddani <dsiddani@codeaurora.org>
2016-11-09 18:10:22 -08:00
Linux Build Service Account
e95375540c Merge "crypto: msm: qce50: Prevent deadlock during timeout" 2016-11-09 16:25:10 -08:00
Linux Build Service Account
05a0fa2b20 Merge "dma-mapping: use iommu_unmap for unmapping address" 2016-11-09 16:25:09 -08:00
Linux Build Service Account
d9a9a205a9 Merge "ARM: dts: msm: switch to RPM control for regulators on MSMFALCON" 2016-11-09 16:25:09 -08:00
Linux Build Service Account
dd4dc008b8 Merge "fg-memif: update IMA error handling and clear sequence" 2016-11-09 16:25:07 -08:00
Linux Build Service Account
c05ea068d8 Merge "spmi: pmic-arb: support show_resume_irq" 2016-11-09 16:25:04 -08:00
Linux Build Service Account
0352bfd3f3 Merge "ASoC: wcd934x: Change SIDO reference to internal" 2016-11-09 16:25:03 -08:00
Linux Build Service Account
31ce266c3f Merge "msm: kgsl: Enable retention for gpu core clock" 2016-11-09 16:25:01 -08:00
Linux Build Service Account
67dc1ae411 Merge "msm: kgsl: Ignore EAGAIN when programming perfcounter" 2016-11-09 16:24:58 -08:00
Linux Build Service Account
2d01b7daf1 Merge "msm: kgsl: Increase fault detection threshold value" 2016-11-09 16:24:57 -08:00
Linux Build Service Account
af730b8728 Merge "wil6210: validate wil_pmc_alloc parameters" 2016-11-09 16:24:56 -08:00
Linux Build Service Account
71e6cbe0b0 Merge "mdss: sde: Add register read/write debugfs for SDE rotator" 2016-11-09 16:24:55 -08:00
Linux Build Service Account
cc699c3f57 Merge "msm: kgsl: Declare iomem addresses as void" 2016-11-09 16:24:54 -08:00
Linux Build Service Account
04fa73f4a4 Merge "msm: kgsl: Correct the merciu size for a540" 2016-11-09 16:24:53 -08:00
Vikram Mulukutla
4142e30898 timer: Don't wait for running timers when migrating during isolation
A CPU that is isolated needs to have its timers migrated off to
another CPU. If while migrating timers, there is a running
timer, acquiring the timer base lock after marking a CPU as
isolated will ensure that:

1) No more timers can be queued on to the isolated CPU, and
2) A running timer will finish execution on the to-be-isolated
   CPU, and so will any just expired timers since they're all
   taken off of the CPU's tvec1 in one go while the base lock
   is held.

Therefore there is no apparent reason to wait for the expired
timers to finish execution, and isolation can proceed to migrate
non-expired timers even when the expired ones are running
concurrently.

While we're here, also add a delay to the wait-loop inside
migrate_hrtimer_list to allow for store-exclusive fairness
when run_hrtimer is attempting to grab the hrtimer base
lock.

Change-Id: Ib697476c93c60e3d213aaa8fff0a2bcc2985bfce
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
2016-11-09 15:57:24 -08:00
David Keitel
9dd0547cf5 ARM: dts: msm: add new mapping table for memlat
Modify the code-dev mapping table for memlat to
further improve power and performance on msmcobalt v2.

Change-Id: Ida2c99d7fd56b5b277653c42808f08f4f23ed790
Signed-off-by: David Keitel <dkeitel@codeaurora.org>
2016-11-09 12:49:36 -08:00
Saravana Kannan
5d1169198d PM / devfreq: Restart previous governor if new governor fails to start
If the new governor fails to start, switch back to old governor so that the
devfreq state is not left in some weird limbo.

Change-Id: I7cf1e6ceb63d27ce08b2d17b97a9844d257464ce
Signed-off-by: Saravana Kannan <skannan@codeaurora.org>
2016-11-09 09:55:27 -08:00
Yasir Malik
8ae62993fc crypto: msm: qce50: Prevent deadlock during timeout
Lock out interrupts during issuing dummy request in timeout to prevent from
a potential deadlock happening.

Change-Id: I986d8c36c839a1dee23761465ad331ffc31dd6ac
CRs-Fixed: 1008319
Acked-by: Che-Min Hsieh <cheminh@qti.qualcomm.com>
Signed-off-by: Yasir Malik <ymalik@codeaurora.org>
2016-11-09 09:43:31 -08:00
Alan Kwong
54b03424a7 msm: sde: add buf_finish callback to clear last fd
Fd is tunneled using userptr memory type to v4l2 rotator
driver. Fd can assume the same value between multiple qbuf but
with the underlying mapping modified. However, v4l2 assumes that
if userptr of the same value are passed in, the underlying buffer
is the same and will bypass memory mapping callback. This will
cause problem for fd tunneling because the obsolete mapping is
used.

To ensure buffer mapping, add buf_finish callback to clear last
fd value before dequeuing buffer back to user client. This will
force the next queue buffer command to invoke memory mapping callback
since the incoming fd value is different from the reset value.

CRs-Fixed: 1084634
Change-Id: I932a58fc633918b151959fcbe320668a87dbc49c
Signed-off-by: Alan Kwong <akwong@codeaurora.org>
2016-11-09 08:22:13 -08:00