Commit graph

563843 commits

Author SHA1 Message Date
Karthikeyan Ramasubramanian
42e7b9ac7c trace: Add snapshot of ipc_logging driver
This snapshot is taken as of msm-3.18 commit e70ad0cd (Promotion of
kernel.lnx.3.18-151201.)

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
2016-03-22 11:07:56 -07:00
Karthikeyan Ramasubramanian
749efcfb0f defconfig: arm64: msm: Enable SMEM log
The SMEM log allows certain log events to be synchronized between
multiple processors in the SoC.

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
2016-03-22 11:07:56 -07:00
Karthikeyan Ramasubramanian
29b6603c1e soc: qcom: Add snapshot of SMEM_LOG Driver
This snapshot is taken as of msm-3.18 commit e70ad0cd (Promotion of
kernel.lnx.3.18-151201.)

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
2016-03-22 11:07:55 -07:00
Rohit Vaswani
7d3fb3c99c defconfig: msm-perf: Bring it up-to-date with missing features during upgrade
Also run savedefconfig to remove any diff on both defconfigs.

Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
2016-03-22 11:07:54 -07:00
Rohit Vaswani
d8e295377d defconfig: Enable CONFIG_SYNC for Android
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
2016-03-22 11:07:53 -07:00
Jeremy Gebben
b28215f001 ion: msm: fix Makefile dependencies
ion_cma_heap.o, ion_cma_secure_heap.o, and ion_system_secure_heap.o
all call functions which are only available if CONFIG_MSM_ION
is enabled.

Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
2016-03-22 11:07:52 -07:00
Jeremy Gebben
74bcc31ab9 uapi: scsi: add missing header dependencies
Add #include dependencies to pick up definitions of __u32 and HZ.

Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
2016-03-22 11:07:51 -07:00
Jeremy Gebben
be3345a032 uapi: fix export of msm_ion.h
Make this file be exported via symlink like the rest
of the android staging uapi headers.

Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
2016-03-22 11:07:51 -07:00
Jeremy Gebben
bfa70fb909 msm: secure_buffer: fix stub functions
All of these need to be 'static inline' to avoid multiple
definition problems when MSM_SECURE_BUFFER=n.

Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
2016-03-22 11:07:50 -07:00
Abhimanyu Kapur
94fe94c1eb defconfig: arm64: Add msmcortex defconfigs
Add defconfig for supporting msmcobalt debug, perf
and other similar targets.

Change-Id: I3a55fea53cbfe65131fc4ccd505bc684cda9b2fa
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
2016-03-22 11:07:49 -07:00
Stepan Moskovchenko
1ca3decb1b smp: Allow booting a specific subset of CPUs
In a heterogenous multiprocessor system, specifying the
'maxcpus' parameter on the kernel command line does not
provide sufficient control over which CPUs are brought
online at kernel boot time, since CPUs may have nonuniform
performance characteristics. Thus, we introduce a
'boot_cpus' command line argument, allowing the user to
explicitly specify the list of CPUs that shall be brought
online during kernel boot.

Change-Id: I5f119e23202660941fa7be8c4e6dd91a82365451
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
[abhimany: resolve trivial merge conflicts]
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
2016-03-22 11:07:48 -07:00
Abhimanyu Kapur
77228fba61 arm64: Split out MSM8996 from generic ARCH_QCOM platform Kconfig
Add support for CONFIG_MSM89986 and split it out from generic
ARCH_QCOM platform.

Change-Id: Ibc287ffb76e5599ba63449534b264e4f31c98ec6
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
2016-03-22 11:07:47 -07:00
Abhimanyu Kapur
a42ed83c2f pinctrl: qcom: Snapshot pinctrl driver for msmcobalt
Snapshot pinctrl driver and corresponding makefiles
and Kconfig from msm-3.18@b6a638f8795ee77ca
("Merge "msm: mdss: add support to send dcs cmds by
 left port only in video mode")

Change-Id: I129bb9bd4b7edd252550e6851332867be6fa0423
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
2016-03-22 11:07:46 -07:00
Abhimanyu Kapur
e074730c2c ARM: dts: qcom: Snapshot all device tree files for MSMCOBALT
Snapshot all device tree files from msm-3.18@b6a638f8795ee77ca
("Merge "msm: mdss: add support to send dcs cmds by
 left port only in video mode")

Change-Id: I631047dffa019c6d2ee731ead328d332f1c7f3b8
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
2016-03-22 11:07:45 -07:00
Rohit Vaswani
5851f30830 Revert "defconfig: arm64: msm: Enable USB DWC3 and PHY drivers"
This reverts commit 52bfd76cadb4bcc4371ea83429d9de0dab981eb7.
2016-03-22 11:07:45 -07:00
David Keitel
571f0ec333 defconfig: enable subsystem restart, MSM_PIL_GENERIC and PIL_MSS_QDSP6V5
Enable subsystem restart and relevant PIL drivers to allow secure
peripheral image loading and QDSP6V5 loading to work.

Change-Id: I899382d04e6a348cde2d46e9e0e6f3faadab2c5d
Signed-off-by: David Keitel <dkeitel@codeaurora.org>
2016-03-22 11:07:44 -07:00
David Keitel
de5ad6bbd3 defconfig: disable EFI
Change-Id: I26d6398478a8cbdcc56c93f501b70b9f9f2924e8
Signed-off-by: David Keitel <dkeitel@codeaurora.org>
2016-03-22 11:07:43 -07:00
David Keitel
fe350df05e soc: qcom: subsys-pil-tz: initialize DMA ops
Initialize the DMA operations for the MDT data
DMA allocation.

Change-Id: If8eae5e91b4145be8d9e5eeeb28c14cda88e617f
Signed-off-by: David Keitel <dkeitel@codeaurora.org>
2016-03-22 11:07:42 -07:00
David Keitel
e1395a4987 soc: qcom: add snapshot of PIL, SSR and SYSMON drivers/libraries
This is a snapshot of PIL, SSR and SYSMON drivers and libraries as
of msm-3.18 commit
	5cef33a285e91869cebe40a25e6294ae1e5fc9cc
	(Merge "ASoC: msm: Update the AFE clock API support")

Change-Id: Ibebddee32b15fbcb5b18cceac43769d3309e609c
Signed-off-by: David Keitel <dkeitel@codeaurora.org>
2016-03-22 11:07:41 -07:00
Vikram Mulukutla
08c8dcb464 firmware_class: Don't fail request_firmware if we're not using a buffer
A check that the intermediate firmware actually contains data
is performed before returning from request_firmware. Perform
this check only if we're actually using the intermediate
buffer.

Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
2016-03-22 11:07:40 -07:00
Deepak Katragadda
3e47c53624 firmware_class: Add an additional path to fw_path list
Add an additional path, /firmware/image to the list of fw paths
that request_firmware looks into for the firmware images.

Change-Id: I4b9164f222bf0a8546072de97838bf9d49dd8252
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
2016-03-22 11:07:39 -07:00
Deepak Katragadda
098d246f8c firmware_class: Change print levels for some warnings
Currently, when _request_firmware() fails to find the firmware
from the default /lib location, a couple of error messages are
printed denoting the same. Change the print level for these
messages from dev_warn to dev_dbg as it is fairly common to
have the user-space helper loading the firmware for us.

Change-Id: I5e06b3785f58e85eda45d32130b9acbc75cd2c0a
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
[vmulukut: adjusted for upstream changes]
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
2016-03-22 11:07:39 -07:00
Vikram Mulukutla
9543a56f10 firmware_class: Correct a null check in firmware_direct_read
Don't use the fw pointer before performing the null
check on it.

Change-Id: I303f71681647e2acb0b7e340b8f8580436cfb19d
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
2016-03-22 11:07:38 -07:00
Vikram Mulukutla
2d65cf38d3 firmware_class: Include a size argument in unmap_fw_mem
Some implementations may need to know the size of a
region allocated by map_fw_mem in the context of the
unmap_fw_mem callback. Add this as an argument to the
callback signature.

Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
2016-03-22 11:07:37 -07:00
Vikram Mulukutla
9c0b572b23 firmware_class: Allow private data in [unmap|map]_fw_mem
Some callers of request_firmware_direct may need additional
context to be able to map firmware memory. Allow private data
to be passed in with request_firmware_direct, and send this
data along with the [unmap|map]_fw_mem callbacks.

Change-Id: I05a15eb46cc663a4476b784e30e80182a28e10c3
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
[joshc: dropped PIL portions, fixed trivial conflict in firmware.h due
to API rename]
Signed-off-by: Josh Cartwright <joshc@codeaurora.org>
[vmulukut: adjusted for upstream merge conflicts]
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
2016-03-22 11:07:36 -07:00
Vikram Mulukutla
53adc478c8 firmware_class: Introduce the request_firmware_direct API
On devices with low memory, using request_firmware on rather
large firmware images results in a memory usage penalty that
might be unaffordable. Introduce a new API that allows the
firmware image to be directly loaded to a destination address
without using any intermediate buffer.

Change-Id: I51b55dd9044ea669e2126a3f908028850bf76325
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
[joshc: renamed request_firmware_direct to request_firmware_into_buf,
avoiding namespace conflict]
Signed-off-by: Josh Cartwright <joshc@codeaurora.org>
[vmulukut: upstream merge conflict fixups]
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
[dkeitel: upstream merge conflict fixups]
Signed-off-by: David Keitel <dkeitel@codeaurora.org>
2016-03-22 11:07:35 -07:00
Vikram Mulukutla
e7c870ae4c firmware_class: Provide infrastructure to make fw caching optional
Some low memory systems with complex peripherals cannot
afford to have the relatively large firmware images taking
up valuable memory during suspend and resume. Change the
internal implementation of firmware_class to disallow
caching based on a configurable option. In the near future,
variants of request_firmware will take advantage of this
configurability.

Change-Id: I44be7ce3b308b642fb018086def99fcb800a1109
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
[joshc: reworked to use opt_flags instead of 'nocache' bool in fw_desc]
Signed-off-by: Josh Cartwright <joshc@codeaurora.org>
[vmulukut: adjusted for upstream additions to opt_flags]
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
2016-03-22 11:07:34 -07:00
Vikram Mulukutla
7fcfead52c firmware_class: Introduce a firmware descriptor structure
Introduce a firmware descriptor structure that makes it
easier to pass around various configuration options in the
internal implementation of firmware_class.

Change-Id: I5c1da222bccd568fabb26da5baccaa4035331efd
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
[joshc: reworked to make use of upstream's opt_flags member]
Signed-off-by: Josh Cartwright <joshc@codeaurora.org>
[vmulukut: adjusted for upstream changes to opt_flags]
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
[dkeitel: resolved merge conflicts]
Signed-off-by: David Keitel <dkeitel@codeaurora.org>
2016-03-22 11:07:34 -07:00
David Keitel
0b556847c7 of: platform: initialize of_reserved_mem
Initialize reserved memory as part of of_platform_device_create_pdata.

Change-Id: I6bb6ba8279af6771cb61087405cb915f4a0602b3
Signed-off-by: David Keitel <dkeitel@codeaurora.org>
2016-03-22 11:07:33 -07:00
David Keitel
8574df23fd dma-mapping: fix merge conflict mistake
As part of the 4.4 upgrade an incorrect merge
conflict resolution in dma-mapping caused the
function  __dma_alloc_coherent to not work correctly.

Fix this by changing correctly resolving the merge conflict
resolution.

Change-Id: I5b2411187768f2e3c4292a7c28cd742f5eb2dc54
Signed-off-by: David Keitel <dkeitel@codeaurora.org>
2016-03-22 11:07:32 -07:00
Mahesh Sivasubramanian
ea701f6791 defconfig: enable MSM_PM for msm-perf defconfig
Enable sleep driver for QCOM chipsets

Change-Id: I67244ff55690c164634e9233e2d0cec3388c5be8
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
2016-03-22 11:07:31 -07:00
Mahesh Sivasubramanian
b68e362dab defconfig: Enable MPM for msm-perf defconfig
Change-Id: I09313d7809ec939a9d0440d0ab30a5992f512b96
2016-03-22 11:07:30 -07:00
Archana Sathyakumar
76a8be812a irqchip: gic: Propagate CONFIG_PM changes to gic v3
Add suspend, idle power collapse callbacks to enable/disable interrupts.

Change-Id: I4b9b38b76d19423345f148054a2437d552299041
Signed-off-by: Archana Sathyakumar <asathyak@codeaurora.org>

Conflicts:
	drivers/irqchip/irq-gic-v3.c
2016-03-22 11:07:29 -07:00
Archana Sathyakumar
405157e0d5 irqchip: gic: Add arch extension to GIC v3
Propagate platform arch extension to call into platform specific
callback functions for GIC operations.

Change-Id: Ief42e9812e0593572bbde0fbe5e641eb9b3f5412
Signed-off-by: Archana Sathyakumar <asathyak@codeaurora.org>

Conflicts:
	drivers/irqchip/irq-gic-common.c
	drivers/irqchip/irq-gic-common.h
	drivers/irqchip/irq-gic-v3.c
	drivers/irqchip/irq-gic.c
2016-03-22 11:07:28 -07:00
Mahesh Sivasubramanian
8cbe96494f soc: qcom: Use arch_counter_get_cntvct instead of arch_counter_get_cntpct
Kernel version 4.4 has deprecated the use of *pct versions for 64 bit
targets. Hence moving to vct as recommended.

Change-Id: Ibabf3eb28f58daccd58cde207262b34ed3b1c04f

Use vct instead of pct()

Change-Id: Ibabf3eb28f58daccd58cde207262b34ed3b1c04f
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
2016-03-22 11:07:27 -07:00
Mahesh Sivasubramanian
5c2989061e arm64: psci: Support for OS initiated scheme
Existing PSCI implementation supports platform coordinated means of low
power modes where cluster low power modes are aggregated at the platform
level.  Adding support for OS initiated scheme, where is OS is responsible
for selecting cluster low power modes based on last man determination. With
OS initiated scheme, the OS can make better cluster decisions based on
wakeup times of CPUs within a cluster.

To this effect, in OS initiated schemes, the composite state ID is computed
by the idle driver before calling into the cpu_suspend API. The PSCI driver
is modified to use the composite ID to distinguish between retention and
non-retention states.

Change-Id: Iee5533676a28a8f6beb7942dcb908f2fa3518d78
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>

Conflicts:
	arch/arm64/kernel/psci.c
2016-03-22 11:07:26 -07:00
Mahesh Sivasubramanian
76fb22e96d ARM64: smp: Prevent cluster LPM modes when pending IPIs on cluster CPUs
LPM modes can fail if there is a pending IPI interrupt at GIC CPU
interface. On some usecases frequent failure of LPM modes can
cause power and performance degradation. Hence, prevent cluster
low power modes when there is a pending IPI on cluster CPUs.

Change-Id: Id8a0ac24e4867ef824e0a6f11d989f1e1a2b0e93
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>

Conflicts:
	arch/arm/kernel/smp.c
	arch/arm64/kernel/smp.c
2016-03-22 11:07:25 -07:00
Mahesh Sivasubramanian
75765be3fe cpuidle: lpm-levels: Fix compilation issues
Compile drivers/power/qcom based on CONFIG_ARCH_QCOM instead of
CONFIG_ARCH_MSM
Fix use of __get_cpu_var and convert to this__cpu_ptr

Change-Id: I7152d74f9d495f9ab7af0cfd2f3695c9461469fb
2016-03-22 11:07:24 -07:00
Mahesh Sivasubramanian
406f370aba power: soc: qcom: Remove non-PSCI related drivers
Only PSCI compatible targets are supported moving forward. Remove drivers
that are used in legacy power collapse support.

Change-Id: I022bef78433c9693d3cb8752091c2c0ed2e4e994
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
2016-03-22 11:07:23 -07:00
Mahesh Sivasubramanian
7e976bc2a6 regulator: Fix miscellaneous warnings in regulator driver
Fix compiler warnings in regulator code

Change-Id: I8670b5a9591727a8215c6bc56fcdb70e473dd9d8
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
2016-03-22 11:07:23 -07:00
Murali Nalajala
b3445ac6ea lpm-levels: Do not disable non-sec interrupts in suspend
When the system suspend is happening, last core disables
the non-sec interrupts at QGIC by setting the GRPEN1_EL1_NS
to ZERO. This makes core not seen any non-sec interrupts
and would result into system do not wake up from any of
interrupts. Do not touch GRPEN1_EL1_NS register while
system is going into suspend.

Change-Id: I7d6c5047fb4743df187fe49fba18b64db3179bc9
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>

Conflicts:
	drivers/irqchip/irq-gic-common.h
2016-03-22 11:07:22 -07:00
Mahesh Sivasubramanian
885262005f cpuidle: lpm-levels: Fixes for clockevents_notify
The use of clockevents_notify is deprcated and targeted APIs are used
instead of the clockevents_notify callbacks. Switch broadcast timer
notifications to tick_broadcast_enter and tick_broadcast_exit.

Change-Id: I3441873eb4009b105db04f4a18d28ae9ccd07e95
2016-03-22 11:07:21 -07:00
Murali Nalajala
764f9334a3 cpu_pm: Add level to the cluster pm notification
Cluster pm notifications without level information increases difficulty
and complexity for the registered drivers to figure out when the last
coherency level is going into power collapse.

Send notifications with level information that allows the registered
drivers to easily determine the cluster level that is going in/out of
power collapse.

There is an issue with this implementation. GIC driver saves and
restores the distributed registers as part of cluster notifications. On
newer platforms there are multiple cluster levels are defined (e.g l2,
cci etc). These cluster level notofications can happen independently.
On MSM platforms GIC is still active while the cluster sleeps in idle,
causing the GIC state to be overwritten with an incorrect previous state
of the interrupts. This leads to a system hang. Do not save and restore
on any L2 and higher cache coherency level sleep entry and exit.

Change-Id: I31918d6383f19e80fe3b064cfaf0b55e16b97eb6
Signed-off-by: Archana Sathyakumar <asathyak@codeaurora.org>
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
2016-03-22 11:07:20 -07:00
Mahesh Sivasubramanian
201050d557 qcom: kconfig: Enable MSM_PM to enable QCOM sleep drivers
Enable sleep driver for QCOM chipsets

Change-Id: I67244ff55690c164634e9233e2d0cec3388c5be8
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
2016-03-22 11:07:19 -07:00
Mahesh Sivasubramanian
c184ee865f soc: qcom: idle: Snapshot of idle/sleep driver as of msm-3.18
This is a snapshot of the Sleep driver and realted functionality as of
e70ad0cd5efdd9dc91a77dcdac31d6132e1315c1 on msm-3.18 branch

Change-Id: I98fec26849898c5c66abbb1b094439780c23964d
2016-03-22 11:07:18 -07:00
Mahesh Sivasubramanian
a3b546e509 soc: qcom: mpm-of: Add gpio_arch_extn support
To wake up from system sleep, the MPM driver needs to keep track of enabled
GPIO interrupts. Add gpio_arch_extn to support monitoring of GPIO interrupts

Change-Id: If97f566e11eaab452e4b55db1a05e5457f1a8d3f
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
2016-03-22 11:07:17 -07:00
Marc Zyngier
5dd75532da Reverting "irqchip: gic: Drop support for gic_arch_extn"
MSM chipsets rely on arch_extn to get the necessary functionality. Add them
until a upstream solution  can be arrived at.

Change-Id: I773a3e82ca81b1c49cf2581f5288cacaeb6c6db0
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
2016-03-22 11:07:17 -07:00
Abhimanyu Kapur
c191d46b72 irqchip: msm: Add snaphot of msm irq driver
Snapshot the msm irq driver as of msm-3.14 commit:

3bc54cf86bdc7affa7cd4bf7faa3c57fe8f8819d (Merge "msm:
camera: Add dummy sub module in sensor pipeline")

Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>

Conflicts:
	drivers/irqchip/Kconfig
	drivers/irqchip/Makefile

Change-Id: Idf5284906af960fe03dcf881df1b57149c8e6ad8
2016-03-22 11:07:16 -07:00
Mahesh Sivasubramanian
879ffd4f07 defconfg: Enable MPM for msm defconfig
Change-Id: I09313d7809ec939a9d0440d0ab30a5992f512b96
2016-03-22 11:07:15 -07:00
Mahesh Sivasubramanian
5143768513 soc: qcom: Add snapshot of MPM driver
This snapshot is taken as of msm-3.18 commit e70ad0cd (Promotion of
kernel.lnx.3.18-151201.)

Change-Id: I93b163cdd379e3cb9601512d2a06424987b5a132
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
2016-03-22 11:07:14 -07:00