In certain situations, due to resolution mismatch, we may need to
scale up/down the X and Y co-ordinates returned by the touch controller.
Add support for the same where we scale up/down the X and Y touch
co-ordinates returned from the touch controller before sending it to
android. In such cases, we also need to ensure that the display resolution
matches the touch resolution. Add support for that as well.
Change-Id: Ia2dabf480478e26db1e1f0d92ca9ba5a252f18eb
Signed-off-by: Shantanu Jain <shjain@codeaurora.org>
During device resume, the touch resume function is called after
display resume. Touch resume function will take about >200ms.
Defer the touch resume function to a workqueue to reduce the total
device resume time. An optional DT property is added to enable this
on targets that need this feature.
Change-Id: Ia9b055144c5a7f29f0f0d57428cccbe15a7d7a87
Signed-off-by: zhaoyuan <yzhao@codeaurora.org>
Pass the correct QUP instance to the scm call. This is required
for QUP ownership transfer to other subsystems to support the
secure touch usecase.
Change-Id: I3ff53544fc58db908669cddce155f786dde23c41
Signed-off-by: Himanshu Aggarwal <haggarwa@codeaurora.org>
S332U needs to pull down the reset pin after it enters onto
sleep mode to ensure the LPM is enabled.
Change-Id: Ia8d8c1e788eb7d3524df979ad2d9e17ee15c26f2
Signed-off-by: Mao Li <maol@codeaurora.org>
Add support for QUP ownership transfer to other subsystems to
support the secure touch usecase.
Change-Id: I70fd5fb81ce8763095bcfa2feb71d9d806d14bd4
Signed-off-by: Himanshu Aggarwal <haggarwa@codeaurora.org>
Add support for configuring short circuit debounce cycles in
both LCD mode and AMOLED mode. Also, when configuring the
WLED SHORT_PROTECT register, the bits corresponding to DBNC_SHORT
bit fields are incorrectly written, so correct the corresponding
bitmask and the associated code logic to avoid this. Add an
explicit SPMI write to WLED1_CTRL_SOFTSTART_RAMP_DELAY register
as well for LCD mode.
Change-Id: Ibae8926262c52c8db3d04ab355651e5df44ec090
Signed-off-by: Himanshu Aggarwal <haggarwa@codeaurora.org>
Signed-off-by: Shantanu Jain <shjain@codeaurora.org>
Rename the vdd-level header file included from vdd-level-californium
to vdd-level-cobalt, which is the correct name. Also update the
header file to include the FMAX mappings needed for the cobalt
GPUCC driver.
Signed-off-by: Devesh Jhunjhunwala <deveshj@codeaurora.org>
Add part numbers for Kryo2xx seriels of Gold and Silver CPUs.
CRs-Fixed: 969563
Change-Id: I11d2e09483075f2496415cb64fb16d2f599f9f7f
Signed-off-by: Trilok Soni <tsoni@codeaurora.org>
Linux Kernel 4.4 enforces the use of cvt timers in kernel and userspace.
Fix this in the tsens driver.
Signed-off-by: David Keitel <dkeitel@codeaurora.org>
Modify the round_rate() callback function so that it selects
the nearest configured fmax frequency instead of the closest
possible supported frequency of the parent clock. This ensures
that clk_round_rate() always returns power efficient frequencies
for 8996 CPU clocks.
Change-Id: Icc27ba64b9c8af74ee0f81443fea37c4564b9f94
CRs-Fixed: 981475
Signed-off-by: David Collins <collinsd@codeaurora.org>
Allow the VDD_GFX CPR open-loop voltage to be adjusted based
upon aging measurements. This ensures that the closed-loop
voltage has room to increase as necessary.
Change-Id: I7ae8a4f90628f36f5e6164d18a4457552a20a8a1
CRs-Fixed: 949622
Signed-off-by: David Collins <collinsd@codeaurora.org>
Allow the VDD_APCC CPR open-loop voltage to be adjusted based
upon aging measurements. This ensures that the closed-loop
voltage has room to increase as necessary.
Change-Id: I84d5d434cac039b3fbf7f476939de1c968b519a4
CRs-Fixed: 949622
Signed-off-by: David Collins <collinsd@codeaurora.org>
Add support for fuse corner to corner mappings in which the
highest fuse corner is mapped to a corner lower than the
highest corner. This can be used to define a corner which has
a constant voltage offset above the highest fuse corner but which
does not impact interpolation for the lower corners.
Change-Id: Ie41522cb06ca81898f58458694067a567f608df0
CRs-Fixed: 981475
Signed-off-by: David Collins <collinsd@codeaurora.org>
It is only necessary to poll the power gate retention status register
when disallowing LDO retention mode. Once the power control override
register is cleared, any power domain is allowed to utilize LDO
retention. Therefore, polling of APCC_PGS_RET_STATUS must only be done
when VDD_APCC is scaled below retention voltage plus LDO headroom
voltage and the voltage is not sufficient to safely support power
domains using LDO retention.
Change-Id: I6578a75167ee4174be6ff8f1895d2d86d2ae8d76
CRs-Fixed: 980775
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
For CONFIG_KALLSYMS, we keep two symbol tables and two string tables.
There's one full copy, marked SHF_ALLOC and laid out at the end of the
module's init section. There's also a cut-down version that only
contains core symbols and strings, and lives in the module's core
section.
After module init (and before we free the module memory), we switch
the mod->symtab, mod->num_symtab and mod->strtab to point to the core
versions. We do this under the module_mutex.
However, kallsyms doesn't take the module_mutex: it uses
preempt_disable() and rcu tricks to walk through the modules, because
it's used in the oops path. It's also used in /proc/kallsyms.
There's nothing atomic about the change of these variables, so we can
get the old (larger!) num_symtab and the new symtab pointer; in fact
this is what I saw when trying to reproduce.
By grouping these variables together, we can use a
carefully-dereferenced pointer to ensure we always get one or the
other (the free of the module init section is already done in an RCU
callback, so that's safe). We allocate the init one at the end of the
module init section, and keep the core one inside the struct module
itself (it could also have been allocated at the end of the module
core, but that's probably overkill).
CRs-Fixed: 982779
Change-Id: I519f081967785e44a6ea33b16b1da64b14979963
Reported-by: Weilong Chen <chenweilong@huawei.com>
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=111541
Cc: stable@kernel.org
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Git-commit: 8244062ef1e54502ef55f54cced659913f244c3e
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
[salvares@codeaurora.org: resolved context conflicts in module.c]
Signed-off-by: Sanrio Alvares <salvares@codeaurora.org>
Create a debugfs node for PCIe which users have the
option to panic on linkdown instead of trying to recover.
Change-Id: Iba485b7312e99ceaaf23997f766a23964670b2ff
Signed-off-by: Tony Truong <truong@codeaurora.org>
Create a debugfs node in PCIe bus driver so that users
can enable or disable EP wakeirq for each root complex.
Change-Id: I7940001453c08593f2940fda378341ae43ff5bad
Signed-off-by: Tony Truong <truong@codeaurora.org>
Update the devfreq CPU cluster to CBF clock frequency mapping
tables based upon characterization results. This ensures that
minimum power is consumed for each CPU cluster frequency with
minimal performance impact.
Change-Id: If6ffd89f2faf3cd40dba3b7b09e38f46ac1007e9
CRs-Fixed: 980877
Signed-off-by: David Collins <collinsd@codeaurora.org>
commit 347fe47cccb8
("soc: qcom: glink_smd_xprt: Fix race condition of open ack").
After SSR, GLINK_CTRL channel remains up, IPC router send open over
GLINK_CTRL channel. Then process_ctl_event process the ack sent by remote
side and add platform driver without notifyig glink core.Later
platform_driver get probed, the channel has opened and glink is notified
of only remote_open event. Therefore local state will never reach
LOCAL_OPENED.
glink core should be notified about open ack from precess_ctl_event on
receiving open ack event.
CRs-Fixed: 974508
Change-Id: Ibbed8e680246659af2c6b58d91a62b9ff805d43c
Signed-off-by: Dhoat Harpal <hdhoat@codeaurora.org>
In dual VFE case, VFE0 and VFE1 will have different behavior
during stoping pix stream. We should disable write master sync
to ensure both VFEs stop as expected.
Change-Id: Ib63b52a948e526e0d2518cb563a4fc4d67340d0f
Signed-off-by: chiz <chiz@codeaurora.org>
CRs-Fixed: 977856
G-Link driver notifies IPC Router about intent request events in atomic
context. IPC router is allocating from with GFP_KERNEL.
Allocate the memory from atomic pool with GFP_ATOMIC.
CRs-Fixed: 978562
Change-Id: I75a38a2765e06aa490f91a79e5fd5c83f3c12c23
Signed-off-by: Dhoat Harpal <hdhoat@codeaurora.org>
Create a scm group to enable profiling time spent in a scm call.
This will help determine which scm call is spending how much time in
a higher execution level.
To enable "echo 1 > /sys/kernel/debug/tracing/events/scm/enable".
It is disabled by default. If enabled, traces can be found in
Ftrace logs.
Ftrace Output Example:
PROCESS CPU TIME SCM ID, X0, Number of args, args[0-2], X5, return values [0-2]
kworker/u8:4-329 [002] 128.201129: scm_call_start: func id=0x42000904 (args: 0x6, 0x2, 0x200000000, 0x65b8000000019, 0x142e0f000)
kworker/u8:4-329 [002] 128.201383: scm_call_end: ret: 0, 0, 0x4a07e00000001
kworker/u8:4-329 [002] 128.201464: scm_call_start: func id=0x42000904 (args: 0x6, 0x3, 0x1312d0000000000, 0x17900000000, 0x142e0f000)
kworker/u8:4-329 [002] 128.201542: scm_call_end: ret: 0x1bf03dddddd, 0x2f72656b726f776b, 0x343a32
CRs-Fixed: 969770
Change-Id: I4e5aaff796dbc9457c55fa529114dcb57780b7ec
Signed-off-by: Sanrio Alvares <salvares@codeaurora.org>
Add a quirk to mask out the RB 1-3 activity signals in the hang
detection logic. Set this quirk in the devicetree for 8996v2 and
v3.
CRs-Fixed: 978849
Change-Id: I63073b5973644453e775b41a9361de55d7933a07
Signed-off-by: Shrenuj Bansal <shrenujb@codeaurora.org>
During the initialization sequence, submit a set of important
packets to the GPU in order to pre-load the I-cache with the
critical ucode instructions.
CRs-Fixed: 978777
Change-Id: Ic6a17b24d8c3aa383af8e25cf9ef771459d65796
Signed-off-by: Shrenuj Bansal <shrenujb@codeaurora.org>
Add Qualcomm CPU Implementer ID macro. This is required for the
Errata framework.
CRs-Fixed: 969563
Change-Id: I354ed0d131c80805915f0a7533351187a89b7e91
Signed-off-by: Trilok Soni <tsoni@codeaurora.org>
Kryo2xx Silver CPUs support L1 and L2 cache error reporting. Add
support for the same.
CRs-Fixed: 969563
Change-Id: Ia2c860803169843a227eacebc9869e11673ffc7a
Signed-off-by: Trilok Soni <tsoni@codeaurora.org>
Specify VDD_APCC CPR open-loop and closed-loop voltage
adjustments for CPR revision 0 parts according to the most
recent hardware characterization results. These adjustments
result in major power savings for most corners and also ensure
stable operation for all corners.
Change-Id: I4fc66df626a102c478c1bf20a736869f5e389089
CRs-Fixed: 980877
Signed-off-by: David Collins <collinsd@codeaurora.org>
Increase the max threshold value so that user has more flexiblity
to tune the value.
CRs-Fixed: 971774
Change-Id: Id6408b7ee6779e95c48bcf9087ea7c87b54d42fd
Signed-off-by: Runmin Wang <runminw@codeaurora.org>
If the source is at the boundary of the VMA, loading one word at a
time can cause an alignment fault when the adjacent VMA is IO mapped.
Do byte-by-byte copy until source aligns to 8 bytes and then continue
with optimized version.
CRs-Fixed: 973724
Change-Id: I05e085597c58169fc6e275508a907029b9c7ec64
Signed-off-by: Sanrio Alvares <salvares@codeaurora.org>
Add the qcom,is-cbf-regulator flag to the VDD_APCC CBF CPR
regulator in order to differentiate it from the power cluster and
performance cluster CPR regulators. This allows CBF specific
fused voltage offset to be applied.
Change-Id: I0a8710fafaac9e8bf7f3c5cc988d55a44bc99b96
CRs-Fixed: 980901
Signed-off-by: David Collins <collinsd@codeaurora.org>
Disabling power collapse during camera open. We send
disable request before opening camera and enable it
back after opening camera
Change-Id: Idd55021063eace18fa20f00183a41a502f5c88a1
Signed-off-by: Ramesh V <ramev@codeaurora.org>
Add changes to expose dump stack functionality which can be used
by driver to dump stack information when it requires.
CRs-Fixed: 979886
Change-Id: Ib929ad0a510b996ac54d17afd2957ea487c62851
Signed-off-by: Abhishek Singh <absingh@codeaurora.org>
To open up the frequency range from 150 to 300MHz, change
the fixed CBF PLL post divider from 2 to 4. That way, to
generate frequencies less than 300MHz, the VCO can be run
at 4x with the CBF mux set to use the main output.
While we're here, add the cbf_pll_main clock to the lookup
table.
CRs-Fixed: 980903
Change-Id: I9f70f18e01199c41e1940857afb7bdd477c1c04c
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
The default value of the MPP2 on fused platforms should be
deasserted.
Change-Id: Ied8d9503fc7a6d57df1aaba3874dedf0a3720645
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Signed-off-by: Tony Truong <truong@codeaurora.org>
Let the QPNP_MISC config depend on the SPMI or the
MSM_SPMI configs instead of SPMI only.
CRs-Fixed: 972331
Change-Id: I9a0d53c6cf0aeeaf258cfca5706c68a6a8b7e37a
Signed-off-by: Devesh Jhunjhunwala <deveshj@codeaurora.org>
This patch adds a snapshot of the QPNP misc driver as of msm-3.14
commit:
e016c39467094409c9c872b02ec619164913054a (Merge "msm: thermal:
Fix compilation issue when THERMAL_MONITOR is disabled")
CRs-Fixed: 972331
Change-Id: I48dc9857379c388ddff86b20320cdfa23bb22af8
Signed-off-by: Andy Gross <agross@codeaurora.org>
Signed-off-by: Devesh Jhunjhunwala <deveshj@codeaurora.org>
Configure the RECAL_VCTL/CPR_DLY registers to enable and set the
voltage delay time for hardware based droop detector recalibration.
Only needed on MSM8996 Pro.
CRs-Fixed: 980641
Change-Id: I217e4510b020b7708665394c42f46773bd8b225d
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
Add support for multitouch procotol B, in order to track
object based ID touch activities.
Change-Id: I9b6941b3fea2f5c28434793073330cd4abe9fa74
Signed-off-by: Jigarkumar Kishorkumar Zala <j_zala@codeaurora.org>
The guard page should be enabled on the gpuobj
import path to ensure allocations that are mapped
are safe from the UCHE overfetch bug.
CRs-Fixed: 975219
Change-Id: I42b7046ce3d314ec21c8fb03ef4fbbcdb094d8cf
Signed-off-by: Sushmita Susheelendra <ssusheel@codeaurora.org>
Instead of looking up the process by pagetable base and
name, use the fault context to extract the pid and other
process specific information. This works for both the
per-process and global pagetable configurations and also
reduces some locking. This also reports the correct
pid and task name in the global pagetable configuration.
CRs-Fixed: 971753
Change-Id: I9c869527c3d1b2606f3d12234163935d6f5e43a9
Signed-off-by: Sushmita Susheelendra <ssusheel@codeaurora.org>
Slimbus master is present in different subsystem
on different tragets.
Register with specific subsystem as mentioned in
the device tree.
Change-Id: I1bee7fdd7578deedca8e4e43af9055b41b96d652
Signed-off-by: Dilip Kota <dkota@codeaurora.org>
With 3.18 kernel, get_session_time command to
DSP is updated to new command. This
command is not supported on older targets as
they have an older DSP version. To have backwards
compatibility, based on DSP version choose which
command to use.
CRs-Fixed: 978676
Change-Id: I76b0cfcd84df90d7a206690cb8aa1eb773fdc53d
Signed-off-by: Ashish Jain <ashishj@codeaurora.org>
Update logic to print VADC peripheral register content
in case adc conversions are met with error condition.
Change-Id: Ic4e2cf7b9bfc7b2a647aa773fbcafb6bd0c6019e
Signed-off-by: Rama Krishna Phani A <rphani@codeaurora.org>
Move spin lock init for no wait que before apr registration.
If apr registration fails asm free client will free
the no wait que by acquiring spin lock. Hence spin lock
init for no wait que should happen before apr registration.
CRs-Fixed: 979701
Change-Id: I5ef85e39ab5e3babfb2e097005c0d1553cc38f51
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
Add support to enable Bluetooth A2DP playback
via DSP.
CRs-Fixed: 978676
Change-Id: I02f2af671bed10e45b764af5cc9a0977a3d9e66e
Signed-off-by: Ramlal Karra <rkarra@codeaurora.org>
Signed-off-by: Ashish Jain <ashishj@codeaurora.org>
Check cmap data size before copying the
userdata to avoid null access.
Change-Id: If75c0339cf5e0ace6a35abc625f02283cc99298c
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
