This reverts commit fa5a089eb6 ("defconfig: arm64: Enable app
specific setting on MSM8996").
Feature is not applicable to msmcobalt and only applicable
to MSM8996.
CRs-Fixed: 1054373
Change-Id: I9464305f6cac6aedb3e5763979dba4cba92e050b
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
For msmcobalt, it was found that, for low-latency audio
playback, audio driver requests for a PM QoS with 10% of
the period size. This value is too small for CPU to
come back up from L2 PC, and hence CPU never enters into
L2 PC, which increased power consumption.
ALSA core framework already has a way to vote on behalf of
client driver, with a latency value of 75% of period size.
To enable CPU to enter L2 PC, fall back to use ALSA
core provided PM QoS of 75% for low-latency audio playback
instead of the custom PM QoS request.
CRs-Fixed: 1048743
Change-Id: Icff3c15a4f1d26f43274465063259f06737fe495
Signed-off-by: Banajit Goswami <bgoswami@codeaurora.org>
Renable GIC_V3_ACL on msmcobalt-perf defconfig to disable ITS
support.
CRs-Fixed: 1054447
Change-Id: Ia0bd3026025c1215c595219a19cc164bc3758363
Signed-off-by: Runmin Wang <runminw@codeaurora.org>
ICNSS uses SMMU which requires aggre2_noc_clk. Hence vote
on aggre2noc clock through bus bandwidth.
CRs-Fixed: 1053538
Change-Id: I5e300cf81bd8b653e9a5611ed60b2b770e94a863
Signed-off-by: Yuanyuan Liu <yuanliu@codeaurora.org>
Add support to allocate/reserve a virtual address range without
physically backing. Add support to allocate physically backing memory
without assigning it a virtual address. Add support to unite
the two forementioned allocations together. Add support to
divorce them from one another. Add support to let their kids
do cache operations as they see fit.
Create a 'dummy' page that is used to back virtual allocations
that are not yet backed by physical memory.
CRs-Fixed: 1046456
Change-Id: Ifaa687b036eeab22ab4cf0238abdfbe7b2311ed3
Signed-off-by: Carter Cooper <ccooper@codeaurora.org>
Signed-off-by: Tarun Karra <tkarra@codeaurora.org>
Memory barrier is required after the reset is asserted and de-asserted, so
add the same.
Change-Id: I17532984f546be97ba9862c07dd694b3fdd592fb
Signed-off-by: Taniya Das <tdas@codeaurora.org>
In soundwire read/write commands, register value is defined
as 8 bit but it is accessed through 32 bit pointer which
may cause out of boundary memory access. Fix this issue by
typecast appropriately.
BUG: KASan: out of bounds access in swrm_read+0x1dc/0x30c at
addr ffffffc089871880
Write of size 4 by task kworker/u8:5/236
==addr ffffffc089871880
[<ffffffc00081d174>] swrm_read+0x1d8/0x30c
[<ffffffc000819808>] swr_read+0x5c/0x74
[<ffffffc000741e58>] regmap_swr_read+0xd8/0x11c
[<ffffffc00073a350>] _regmap_raw_read+0x210/0x314
[<ffffffc00073a4b0>] _regmap_bus_read+0x5c/0xb4
[<ffffffc000739548>] _regmap_read+0xe0/0x1ec
[<ffffffc0007396b8>] regmap_read+0x64/0xa8
[<ffffffc000dc9dd4>] snd_soc_component_read+0x34/0x70
[<ffffffc000dc9f44>] snd_soc_read+0x6c/0x94
Memory state around the buggy address:
ffffffc089871780: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc
ffffffc089871800: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc
Change-Id: I3c56dffb4ca197e8fc23d54a44282a60254dd001
Signed-off-by: Vidyakumar Athota <vathota@codeaurora.org>
Use the exclude_idle attribute of the perf events to avoid reading
PMUs of idle CPUs. The counter values are updated when CPU enters
idle and the saved value is returned when the idle CPU is queried
for that event provided the attribute is set in the perf_event.
Change-Id: I61f7a7474856abf67ac6dfd9e531702072e108a5
Signed-off-by: Patrick Fay <pfay@codeaurora.org>
Current code doesn't restart perf after hotplug and power collapse
which makes monitoring in low power modes difficult. This patch adds
support for the hotplug notifier events and creates a common path for
the power collapse and hotplug events.
Change-Id: I52e6978b1c104fd78bc42e4600ceb111b47b3e11
Signed-off-by: Patrick Fay <pfay@codeaurora.org>
