SDHC v5.0 onwards, SDHC includes the inline interface for
cryptographic operations which is ICE HCI.
This patch includes the driver changes for supporting crypto
operations with ICE HCI in noncq mode.
Change-Id: I3253b796212f63853cb3f6cf130f0a8542595428
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
On SDHC v5.0 onwards, SDHC includes the inline interface
for cryptographic operations which is ICE HCI.
This patch includes the driver changes for supporting crypto
operations with ICE HCI in cmdq mode.
Change-Id: I618a0a4b7356f2f19c31d67fca1664daa51b09f9
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
Add new sdhci host_op for updating ice configuration while sending
request through cmdq. Adding provision for supporting the ice
context configuration for ICE HCI.
Change-Id: I0e7299cfb1064c117aa94fb2416cc5cc4f1ec5f6
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
Factor out the logic of getting ice config parameters from
sdhci_msm_ice_cfg().
With ICE2.0, same sdhci_msm_ice_cfg function is being called from cmdq
and noncq. But with ICE3.0 support, cmdq needs a separate host op.
Since this logic of getting ice config is common for noncq and cmdq,
by having it in separate function, same can be reused
in cmdq host op as-well.
Change-Id: If2cf26667acd54cb7ee7bd6283d8f24fcbf60791
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
Factor out the logic of updating the SDHC ICE config registers
from sdhci_msm_ice_cfg().
For ICE3.0, different set of SDHC ICE registers are need to be updated.
So having this logic in separate functions, we can have logical
separation for ICE2.0 and ICE3.0.
Change-Id: Ib3d3f9701875000985dc9382bdcdf5fb0e872a43
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
SDHC v5.0 onwards the ICE reset register offset got updated.
Update the register offset based on the SDHC version.
Change-Id: I9c1250460cddf72837446b54fe03e3c52f11b234
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
Check if the SDHC has ICE HCI support. If support is present,
enable the cryptoghrapic support inside SDHC.
Also ensure that it is re-enabled after SDHC is reset.
By default ICE HCI is disabled.
Change-Id: I43a65279088d70b415c396bc3e51e0e510bb7f9c
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
Enable the android verity device and support for
forward error correction.
Change-Id: I37c74d748f45bd5b5a0ac6b55c6709f662498433
Signed-off-by: Adinarayana Gupta Grandhi <agrandhi@codeaurora.org>
I2S_PCM config as per SDM architecture is taken
care in LPAIF. It is not required to set any LPAIF
register to config I2s or PCM mode from Apps side.
Remove the code related to i2s_pcm config.
Change-Id: Ic8217b6dc178a7248979e7c2ca183286597112ad
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
Generally, during card suspend we call mmc_power_off
and disable controller clocks.
Now consider below sequence of events :
suspend -> resume -> suspend.
1) During first platform suspend, mmc_power_off will
be called and clocks would be disabled.
2) As a part of platform resume, we enable controller
clocks and defer card resume when
MMC_BUSRESUME_NEEDS_RESUME flag is set.
3) During next suspend we check if card is already
suspended (i.e MMC_BUSRESUME_NEEDS_RESUME is set)
and return without doing actual suspend (where we
call mmc_power_off and disable controller clocks).
So in this scenario, controller clocks will remain ON
even though card state is SUSPENDED.
Fix this by disabling controller clocks during suspend
if controller clock was ON.
CRs-Fixed: 1088893
Change-Id: Id54a15d7f6a7131dab609eec1db158c64ada83ce
Signed-off-by: Sayali Lokhande <sayalil@codeaurora.org>
CC can debounce several times while VBUS is present and if APSD is
disabled the APSD result will be unknown. Disable APSD run on CC
debounce when APSD is disabled so the APSD result will not be reset in
this case.
Change-Id: Ia0b18605ea7d51aab0426bc7ad7c873152f42dc7
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
