Use the correct LED_OPTIONS mask to enable all the supported
flash prepare APIs.
CRs-Fixed: 1090029
Change-Id: I66f6de42b106fa2027285e7393b6f9fc143d00d8
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
Enable haptics for QRD SKUK and VR1 to make vibrator working
CRs-Fixed: 1089954
Change-Id: I0718cd7d76669fb8743a59a322ac2a5eaa7c45f6
Signed-off-by: cyizhao <cyizhao@codeaurora.org>
Split functions into groups corresponding to mirrorA and
mirrorB. This will help identify which function is selected.
Change-Id: Iefcb4a4b595ef0778e983a1902a5897cf292705f
Signed-off-by: Venkatesh Yadav Abbarapu <vabbar@codeaurora.org>
Currently, dev_*() variants are used in the flashv2 LED driver
for logging. However, it spews the kernel log because of the
device name being longer. Logging with device name is also not
really needed. Move to using pr_*() variants. Add a pr_fmt() to
help that by adding a function name which will be more useful.
Change-Id: I42503ccd2b2dcc62c5c868132d202b9698c9d216
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Add support for configuring the three thermal mitigation
thresholds from device tree.
CRs-Fixed: 1060212
Change-Id: Iafb7915e196a18b5f8076dda8fb06a4bd71a8e6e
Signed-off-by: Devesh Jhunjhunwala <deveshj@codeaurora.org>
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
There are some features which needs to be enabled based on the
PMIC. PMIC information such as subtype, revision can be obtained
from revid peripheral. Hence add support to read pmic revid.
Change-Id: Ie7a94f59e58b8f1b0816afda2496449694629205
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Add battery profile for these two devices to make sure FG could load it
and work as expected.
CRs-Fixed: 1086571
Change-Id: Id89f54f58bb2d5f7294c0244ab0ba39e90b5ecac
Signed-off-by: cyizhao <cyizhao@codeaurora.org>
FG profile data is updated for cobalt battery according to the new
battery characterization process.
CRs-Fixed: 1086571
Change-Id: Id0a74bc74e5ef1fc08af63ace50ab4774820597c
Signed-off-by: cyizhao <cyizhao@codeaurora.org>
Since not all frequencies line up between speed bins,
the common cpufreq table sometimes has frequencies
that round up the same actual frequency.
Fix this by skipping those frequencies.
Change-Id: I0516cc67a1343150f3d1f838b9d9b329e8e1e498
Signed-off-by: Rohit Gupta <rohgup@codeaurora.org>
Signed-off-by: David Keitel <dkeitel@codeaurora.org>
Export core control boost function to make it accessible to kernel
modules.
Change-Id: I94359afa433ad57dd5bfeae3cb78a1f196cd02fe
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
CTS malloc tests on Android 'N' expects higher entropy in
mmap returned address. Present value of mmap random bits
is not providing enough variations for 32 bit tasks.
Increase mmap_rnd_bits for 32bit and mmap_rnd_compat_bits
for 64bit targets to value of 16.
Change-Id: Ibf6463467f28221470619b4f43ece062d41ae6b8
Signed-off-by: Shiraz Hashim <shashim@codeaurora.org>
Per hardware requirements update dtsi file to remove
min svs power level.
CRs-Fixed: 1085733
Change-Id: I066804e9f8bc527d58dd5199664a5756a0f3d298
Signed-off-by: Oleg Perelet <operelet@codeaurora.org>
Ensure variables are set before the are used to prevent random behavior.
Change-Id: Ib31e5aca648c0f442afe4cbe576ad79786fe6427
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
There are couple of instances where we are declaring
variable without proper initialization and we
might end up returning these uninitialized
variables. Fix this by initializing them during
declaration.
Change-Id: Icd5b504c35683e94383d2cefd186f66000478e82
Signed-off-by: Susheel Khiani <skhiani@codeaurora.org>
When IPA uC fails to stop a GSI channel with GSI STOP_IN_PROG
state, apps needs to sleep for 1ms and retry.
Change-Id: I9e6022ab996861d3d78721aadea9e6116ded4e0f
CRs-Fixed: 1087474
Acked-by: Ady Abraham <adya@qti.qualcomm.com>
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
This reverts commit bfebb79e7c ("clk: msm: clock-gpu-cobalt:
Update the graphics core clock frequency") since we now want
to enable scaling the graphics core clock upto 710 MHz on
MSMCOBALT v2.
Change-Id: I2715197a2b5cbe41da5b1983ff3066fa5d42c483
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
The reliability algorithm has a dependency for OSM to be initialized
before it is enabled.
Enable reliability algorithm in the LMH DCVSh hardware for both the
clusters from KTM. KTM is enabled, only after OSM populates the OPP
table. So this solves the dependency.
Change-Id: I4a382915a6c3a6b9d445ec1f5d57fb499a011f1a
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
Currently the code depends on implicit type conversion when converting
ADC readings. Make the type conversions explicit.
Change-Id: I09b5d4cd219b0a53559176525d9b501e5a6dc0c9
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
Currently when the battery is charging (sinking current) the ibatt is
positive. Change the scale polarity so that ibatt is negative when
the battery is charging.
Change-Id: I431dcc766df94adb7ee85d4cb32d9181a74d871a
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
PMI8998 register 0x1690 BIT(2) is incorrectly documented. This bit enables
a feature to disable the parallel charger via STAT when the PMI is
supplementing a system load using the battery. This feature is not
recommended since SW is limiting the power that the parallel charger can
draw based on the input power available, and the default power
distribution ensures that 50% of the available input power is allocated to
the PMI. Disable this feature.
Change-Id: I1e5400eb64b6b61076617b5b26fc750c6e8d0270
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
Update the qcom,allow-aging-voltage-adjustment property for
VDD_APC0, VDD_APC1, and VDD_GFX CPR regulators in order to match
hardware fusing. Aging fuses will be blown for VDD_APC0 and
VDD_APC1 on parts with local CPR revision 4 and for VDD_GFX on
parts with global CPR revision 3.
Also update the open-loop and closed-loop voltage adjustments so
that the maximum 15 mV aging margin is applied on all parts in
which aging adjustments are not enabled.
Lastly, enable open-loop aging adjustment for VDD_GFX so that
the aging voltage margin is added back into the open-loop voltage
as needed at runtime.
Change-Id: I481abdd54ce1e75bdebf908a61d6b484b377f55a
CRs-Fixed: 1081084
Signed-off-by: David Collins <collinsd@codeaurora.org>
After commit 605ad7f184 ("tcp: refine TSO autosizing"), kernel
throttles uplink TCP data in case there is not sufficient amount
of socket buffer available due to delayed release of buffers
through TX completions in the physical net device.
Work around this by orphaning the socket buffer. This makes the
kernel assume that more packets can be sent in this scenario.
Out of band signaling and flow controlling at qdisc / HTB layer
should guarantee no issue for flow control.
Throughput difference for IPv4 TCP UL -
Before change : 143Mbps
After change : 146Mbps
CRs-Fixed: 1088104
Change-Id: I251ed7938c29e08954d4c81d3041cb235a39d266
Signed-off-by: Subash Abhinov Kasiviswanathan <subashab@codeaurora.org>
When PD negotiates a higher input current limit the ICL override bit will
be set. If a reboot happens then the ICL override will still be set after
the reboot. Clear the ICL override during probe to ensure that the correct
ICL is honored since PD is neither enabled nor has it negotiated a higher
ICL yet.
Change-Id: Iaa5f221d530721f7ff4a413a609192baf98ff359
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
