When dynamic refresh operation is under progress, it is sometimes
expected that the DSI h/w throws DSI FIFO underflow errors. Avoid
throwing DSI FIFO errors on console for this case. Just clear the
DSI error interrupt and do not trigger the DSI underflow recovery
process.
Change-Id: I03b8764397378104981c1a5a6e627e90f53222ee
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
Dump boot remap address register for having more
debug information about boot remap address for pronto.
CRs-Fixed: 989321
Change-Id: I072718da718cc2553d0234af327662958e1758b9
Signed-off-by: Sunkad, Anand Ningappa <asunka@codeaurora.org>
Reserved field is used for VFE-CDS-TNR usecases and is deprecated.
Remove usage of reserved field in cpp driver.
CRs-Fixed: 981024
Change-Id: I587e6ac7b813d8ac0865dcd18431417f8ca67a94
Signed-off-by: Krishnankutty Kolathappilly <kkolatha@codeaurora.org>
Add the cpubw device node with the list of supported DDR frequencies
for msm cobalt.
Change-Id: I726c1fe45e0a8a622c1ca9645a0b481cb70ca215
Signed-off-by: Rohit Gupta <rohgup@codeaurora.org>
Adapting sensor driver to SOC layer by replacing msm specific
routines with SOC API which eases the portability of sensor driver
on to non-msm platforms.
Change-Id: I147dbf714d913b4aa55adc313c354f85cf4b23dd
Signed-off-by: Sureshnaidu Laveti <lsuresh@codeaurora.org>
Scratch buffer size is not sufficient for 14 bit raw.
This leads to page fault. This change increases the size of
scratch buffer to accommodate 14 bit MIPI raw format.
CRs-Fixed: 970413
Change-Id: I866640158c11c0f69505e4fb6b12a9204e2a6ad4
Signed-off-by: Senthil Kumar Rajagopal <skrajago@codeaurora.org>
There can be a scenario where the DSI hardware finished the
dynamic fps operation and updated the DSI interrupt status
bit but the isr is not triggered. This is possible under
heavy system load where the interrupts are disabled by some
other thread on the CPU where MDSS IRQ is affined. Double
check the status of dynamic fps operation by reading back
the DSI interrupt status bit once the wait for interrupt times
out.
Change-Id: Iebe5ab3f6b43b4b3e61666a600488e8ce50f6995
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
During stability test, gpio_direction_output is
invoked with msm gpio 0 which is leading to PC NOC error
as audio is not expected to access this gpio.
Hence initialise gpio to -1 and check if gpio
is valid before using.
CRs-Fixed: 973438
Change-Id: I32d779974f4eb497c62035f7f46c10739ebcfe5f
Signed-off-by: Yeleswarapu Nagaradhesh <nagaradh@codeaurora.org>
IPA resource allocation was updated in order to prevent HOLB (Head Of Line
Blocking) in rare scenarios. This change updates the resource allocation as
required.
Change-Id: Ifb08b2991dc3540b038e6cf79c5531661570ab23
CRs-Fixed: 978301
Signed-off-by: Gidon Studinski <gidons@codeaurora.org>
When a system reboot or shutdown is already underway, ignore SSR errors
so that the system reboot/shutdown process is uninterrupted. However, log
the SSR request so that we know that the subsystem behaved unexpectedly.
Change-Id: Ibfac397bf38749b095dacab4cadf7b77bd003e88
Signed-off-by: Avaneesh Kumar Dwivedi <akdwived@codeaurora.org>
Enable SPS_BAM_CACHED_WP option. The BAM register access is very slow.
The write descriptor offset information in the BAM_P_EVENT_REG is only
set by the host if BAM is runnig in system mode, such as NDP-BAM of crypto.
On each BAM transfter, driver reads the register to figure if
there is enough space to put in new descriptor. Reading the register can be
from driver cache copy, instead of going out to read the register if
SPS_BAM_CACHED_WP option is enabled.
Change-Id: I4c25f81ea79c9a8675d92b799844d906a42bcbb0
Acked-by: Che-Min Hsieh <cheminh@qti.qualcomm.com>
Signed-off-by: Sivanesan Rajapupathi <srajap@codeaurora.org>
Read platform version through efuse register for clients
to know the underlying platform version.
CRs-Fixed: 987512
Change-Id: I16cdb8655e4a79d6f05e3185cac4014d3c0f0f77
Signed-off-by: Maheshwar Ajja <majja@codeaurora.org>
If cable is disconnected early during composition switch
android_disable calls the gadget pullup op which on clearing
run/stop bit does a pm_runtime_put_noidle on the dwc3 device.
This decrements the power usage count on the dwc3 device, but the
child count of the parent mdwc3 device is not decremented.
Upon disconnect handling in the DWC3 state machine,
pm_runtime_put_sync on mdwc3 parent returns EBUSY due to child count
not being 0. As a result runtime idle does not kick in and
prevents low power mode handler being invoked.
Fix this by changing the pm_runtime_put_noidle call to
pm_runtime_put_autosuspend on dwc3 device so that the child
count for the mdwc3 parent is decremented to 0.
CRs-Fixed: 980113
Change-Id: Ibb19188c4230a08bbdef72af7de066735e8c2d67
Signed-off-by: Devdutt Patnaik <dpatnaik@codeaurora.org>
As part of open AHB clocks are currently enabled
based on CSID version check. But CSID version is
updated as part of INIT IOCTL call. Due to this
AHB clocks are not enabled and this is causing
unclocked register access. Now every target have
AHB clocks for ISPIF which needs to be enabled
always.
Change-Id: I576ac20650ac081175942b7d94b6f2b9711b14c8
Signed-off-by: Shilpa Mamidi <shilpam@codeaurora.org>
Update the cpufreq device with the boost frequency for the CPU
power cluster as well as the characterized Turbo Fmax frequency
and new intermediate Turbo frequency for the performance cluster
on speed bin 0 parts. Lastly, update the cpufreq to devfreq
device frequency mapping so that it includes all of the new CPU
cluster frequencies.
Change-Id: I33cbef64add66f63025e854f2991abda4f8e8dbf
CRs-Fixed: 981475
Signed-off-by: David Collins <collinsd@codeaurora.org>
Update the frequency plan for the MSM8996-Pro CPU clocks in order
to include the new boost frequency.
Also add the characterized Turbo Fmax frequency and the new
intermediate Turbo frequency for the performance cluster on speed
bin 0 parts.
Change-Id: I711bf4abd17e8743d459598d03d0f41f6ed1ca14
CRs-Fixed: 981475
Signed-off-by: David Collins <collinsd@codeaurora.org>
Add VDD_APCC CPR boost corner which corresponds to the following
for speed bin 0 parts:
Power cluster = 2188.8 MHz
Also add the characterized Turbo Fmax frequency (2342.4 MHz) and
the new intermediate Turbo frequency (2246.4 MHz) for the
performance cluster on speed bin 0 parts.
Change-Id: If4c1f8b4e06bbd41b8152cdab5b6945b4dfc64bc
CRs-Fixed: 981475
Signed-off-by: David Collins <collinsd@codeaurora.org>
The register offsets for the CPU PLLs might vary with
the standard offsets used for other PLLs. Remove having
the print capability for these clocks.
CRs-Fixed: 941434
Change-Id: Id67a70117b0621d98ac010f712552ecaaf92641f
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
WLAN Functional Drivers Queries cnss platform driver to get the
MAC Address. If the OEM doesn't provide the valid MAC address, the
WLAN Driver fallbacks to use other approaches to get MAC address.
This works under CONFIG_CNSS_MAC feature flag, which will be enabled
only on the OEM platforms. For internal platforms, CNSS driver doesn't
hold any valid mac addresses.
CRs-Fixed: 985585
Change-Id: I1e8a030a32a640cec84cadd6b36b37938d5fe6be
Signed-off-by: Komal Kumar <kseelam@codeaurora.org>
Userspace supplies the actual number of used VFEs in session to ISPIF.
Validate the userspace input value and if found to be invalid, return
error.
CRs-Fixed: 898074
Change-Id: I3288ddb6404e817a705a92281b4c54666f372c56
Signed-off-by: Venu Yeshala <vyeshala@codeaurora.org>
The default settings of the gcc_hmss_gpll0_clk_src make it
run at 600 MHz. Call set rate on the clock so that its
divider settings can be programmed.
CRs-Fixed: 989118
Change-Id: I49aee860dd3f0f4f7ecb024228f182d126424906
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
Changes to support larger queues Q0, Q1 for camera CCI 1.6
onwards.
CRs-Fixed: 974739
Change-Id: Iffdd78b6bf27f0f34d7e72a030264b428acf3f60
Signed-off-by: Viswanadha Raju Thotakura <viswanad@codeaurora.org>
The gcc_mmss_qm_ahb_ahb_clk is controlled by XBL on MSMCOBALT.
There is no need to control it separately from the linux clock
driver. Remove support for it.
CRs-Fixed: 988972
Change-Id: I23b4114096758342403e07058ef4df9b18f6622c
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
Add 300 MHz and 320 MHz as supportable frequencies for the VFE
clock sources on MSMCOBALT.
Change-Id: Id5eac307313bbf2a32d0ae8e4f3ae34e73d376a1
CRs-Fixed: 987721
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
Modifies the behavior of the command engine
to mask out certain commands/notifications sent to the
external mdm, for the purposes of debugging the external
mdm.
Change-Id: Iff35fd87f6d66849f6ec7d2924e1547400967c4e
Signed-off-by: Hanumant Singh <hanumant@codeaurora.org>
Signed-off-by: Bruce Levy <blevy@codeaurora.org>
The gcc_dcc_ahb_clk needs to be controlled by the HLOS clock
driver on MSMCOBALT since its use is restricted to the HLOS
debug driver.
CRs-Fixed: 988930
Change-Id: I1abef9f1268080dbe5dba1e91f4b84fab03ce66c
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
PCIe2 PERST and WAKE GPIO uses different pins on
MSM8996AU CDP. Thus, change the GPIO numbers for
PCIe2 PERST and WAKE in devicetree to match the
correct pins on MSM8996AU CDP.
Change-Id: I20d72b07399c55c3982a5d8c97ca3cc60b6f5c46
Signed-off-by: Tony Truong <truong@codeaurora.org>
Disable the default link training by EP wake IRQ on MSM8996AU CDP
for PCIe RC 1 and PCIe RC 2.
Change-Id: I6468f109d61f8660465c0450f4b2dc60a11746fe
Signed-off-by: Yan He <yanhe@codeaurora.org>
This change adds the device-tree node for cpufreq device along with
the frequency table for power and perf clusters for msm cobalt.
Change-Id: I24b593f26060bfafd2c55faa6e88e4370d305c1e
Signed-off-by: Rohit Gupta <rohgup@codeaurora.org>
For CPR4 controllers, SW does not perform any specific operation
upon receiving ceiling interrupt. Do not configure ceiling interrupt
for CPR4 controllers.
CRs-Fixed: 987525
Change-Id: I467ff12ad8d58036a64928249d4e5671eb8ec6b5
Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>
kgsl_mem_entry_detach_process() makes gpuaddr to NULL and then
removes the entry from mem_idr list.
Sometimes this can cause kgsl_sharedmem_find() to return the
same entry for a different gpuaddr/thread if it satisfies
GPUADDR_IN_MEMDESC().
To avoid this, first remove the entry from mem_idr list and
proceed with unmap/untrack calls.
Change-Id: Ib9f2bc0fdaecd394735dd61b18fdc7de57aa3748
Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
Sometime back a piece of code was added to activate
pages in pageout which failed to writeback. This was
done for the case of failed write to zram, with the
intention of reducing further zram writes. But this
does not make much sense because there can anyway be
other pages which the reclaim path can pick to swap
out.
And this particular logic has a problem. When a write
fails, the page is unlocked. Its locked again before
activating the page, but the page which is now in
swapcache can be brought back with its original mapping
through a fault, which can happen during this period.
This can result in random bugs, for e.g. when shrink_page_list
try to do try_to_free_swap. Here is one such case.
In this case PageSwapCache was cleared by the fault path.
"
zram: Error allocating memory for compressed page: 91433, size=4096
Write-error on swap-device (254:0:731464)
page:de866e80 count:3 mapcount:1 mapping:d5368941 index:0xb2ce5
flags: 0x80018(uptodate|dirty|swapbacked)
page dumped because: VM_BUG_ON_PAGE(!PageSwapCache(page))
"
CRs-Fixed: 988207
Change-Id: I26738d0f8dd3e2dfdb24c25edac24a7d968eeba0
Signed-off-by: Vinayak Menon <vinmenon@codeaurora.org>
Currently, we just print the pagealloc corruption warnings and
proceed. Sometimes, we are getting multiple errors printed down
the line. It will be good to get the device state as early as
possible when we get the first pagealloc error.
Change-Id: I79155ac8a039b30a3a98d5dd1384d3923082712f
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org>
Remove unused variable in the function and avoid typecast
const pointer to non-const ones.
CRs-fixed: 987841
Change-Id: Iaf59087f9d68e134125621afe42d92d49b6b90fc
Signed-off-by: Deven Patel <cdevenp@codeaurora.org>
if ipa-driver failed to get ipa-clk during the
device probe, seeing device hang issue due to
notifier_chain_register. The fix is to only
initialize the notifier_chain_register after
ipa-driver successfully gets ipa-clk.
Change-Id: I705bf9e2b81a9d50cda75d31504f79e082276792
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
Update the PLL_LPF_CAP values to latest recommended settings.
This fixes any PLL locking issues.
Change-Id: I206c9cc343ac435161393445714de2e03a64aaae
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
If a scm_call request to shutdown a TA fails, the TA is not shut down
and still in use, and the resources aren't necessarily leaked. Since
shared memory are still locked in this situation, ion shared memory
cannot be released, otherwise XPU violation occurs. Only need to
release shared memory if TA is unloaded success or that TA cannot
be found
Change-Id: I971485fb541193f77960cc7ca14b5b09de938a43
Signed-off-by: Zhen Kong <zkong@codeaurora.org>
While releasing contexts take a reference to context inside read rcu
lock to avoid racing against context deletion. This will avoid using
dangling context pointer in device_release_contexts.
Change-Id: I76e787f6dde5a324fec23e81829174bd28134c6c
Signed-off-by: Deepak Kumar <dkumar@codeaurora.org>
Configure QMB data movers max reads and max writes. Additionally, select
the client's QMB instance according to the destination, PCIe or DDR.
CRs-Fixed: 974578
Change-Id: Ieb7061dbb6c024bc707f66c7ef07178ed1960fba
Signed-off-by: Gidon Studinski <gidons@codeaurora.org>
Add status='ok' in PIL device tree nodes for MSMCOBALT to support partial
goods loading by bootloader.
CRs-Fixed: 973659
Change-Id: Ia89a686648189bac68e9060e39c931da4b4b7397
Signed-off-by: Puja Gupta <pujag@codeaurora.org>
This is done to avoid a race condition between a context getting
detached and destroyed before the GPU has executed the pt switch
commands.
CRs-Fixed: 987587
Change-Id: I5c485e41a23b288f27e607b3e3ed5bf66cbad98a
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
In order to provide an identical ELF file format between MSM
and MDM, the IPA core driver needs to utilize p_vaddr field as the
destination address for the FW loader.
Change-Id: I818fbe37601dbd4250fc428223a4a1b72b91487a
CRs-Fixed: 987522
Acked-by: David Arinzon <darinzon@qti.qualcomm.com>
Signed-off-by: Sivan Reinstein <sivanr@codeaurora.org>
Add support to make scm_calls to TZ to inform modem start
address and size so that TZ can unmap this range to avoid
speculative access.
Change-Id: I4640ddab56991522870e9879d17fe5732dc40223
Signed-off-by: Avaneesh Kumar Dwivedi <akdwived@codeaurora.org>
Signed-off-by: Arun KS <arunks@codeaurora.org>
MDP driver calls add_event_timer multiple times, resulting
in creating multiple event timers. Due to this irqbalancer
changes MDP irq's affinity to different cpu. Ensure that
add_event_timer is added only once for MDP irq.
Change-Id: If0425ef5a3b3ce56c40da52ff3ced6658f05734a
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
Release the session before the file data is freed to
allow for session informaiton to be retrieved from the
file data.
Change-Id: I78c36d7b34a141c6162a145f7447040395858b64
Acked-by: Bharath Kumar <bkumar@qti.qualcomm.com>
Signed-off-by: Sathish Ambley <sathishambley@codeaurora.org>
Sending zero backlight to AD core will cause a divided by zero
case, which should be avoided. This change adds a check to
prevent zero backlight from been sent to AD core.
CRs-Fixed: 985303
Change-Id: Ida5115edc61dea9855be89186af3faae040fd711
Signed-off-by: Ping Li <pingli@codeaurora.org>
