The PM_QOS_CPU_DMA_LATENCY QOS request attached to an IRQ is ignored
if the IRQ is affined to an isolated CPU. As isolated CPUs enter
deep sleep state, it is better not to affine IRQs to those CPUs.
Change-Id: Ieab4a04eca222b91159208b21bc9e14390ecd62e
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
Userspace can set the default IRQ affinity setting by writing into
/proc/irq/default_smp_affinity file. When an IRQ affinity is
broken during isolation/hotplug,override the affinity to online and
un-isolated CPUs from the default affinity CPUs. If no such CPU
is available, then only override with cpu_online_mask.
Change-Id: I7578728ed0d7c17c5890d9916cfd6451d1968568
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
With commit bfc60d474137 ("genirq: Use irq_set_affinity_locked to change
irq affinity"), affinity listeners receive the notification when the irq
affinity is changed during migration. If there is no online and
un-isolated CPU available from the user specified affinity, the affinity
is overridden with all online and un-isolated CPUs. The same cpumask is
notified to PM QOS affinity listener which applies PM_QOS_CPU_DMA_LATENCY
vote to all those CPUs. As the low level irqchip driver sets affinity to
only one CPU, do the same while overriding the affinity during migration.
Change-Id: I0bcb75dd356658da100fbeeefd33ef8b121f4d6d
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
The PM_QOS_CPU_DMA_LATENCY vote attached to an IRQ is discarded,
if it is affined to an isolated CPU. So we need atleast 1 CPU
in online and un-isolate state. The scheduler rejects isolating
a CPU if it is the only online and un-isolated CPU in the system.
Add the same check for CPU hotplug.
Change-Id: I5bdfe6e3bb0352ed3ae5a2de90097b73d248f3fc
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
When an attempt is made to free an event on a CPU which is
no longer online, perf tries to bring the CPU online. This
can fail, resulting in an UP_CANCELLED notifier, which
eventually tries to acquire the ctx->mutex which is already
being held by the code, which brings up the CPU.
Removing the attempt to bring the cpu up will remove this
deadlock, but also requires temporarily removing support of
counting events across hotplug. This will be restored in a
later patch.
Conflicts:
kernel/events/core.c
kernel/events/hw_breakpoint.c
Change-Id: Iaafa3c6688d26508857472fd5bb32139a137880e
Signed-off-by: Neil Leeder <nleeder@codeaurora.org>
On Mojave lite, adv7481 hardware is not available hence
disable adv7481 and bridge abstraction driver.
CRs-Fixed: 1097877
Change-Id: I1969fc45e50f5ddff25fd70780458d23a9abeed8
Signed-off-by: Shiju Mathew <shijum@codeaurora.org>
The adaptive clock distribution (ACD) mitigates the impact of
high-frequency supply voltage (VDD) droops on microprocessor
performance.
Program ACD functional configuration for silver cluster of sdm660.
Also add the voltage margin savings with ACD to the existing
APC0 CPR closed-loop voltage margins.
Also set CPR_RAMP_EN and VCTL_RAMP_EN bits to 1 in AVS control
register of silver cluster.
Change-Id: Iaff7769cd1e71bbeb773658d0649092bff6e8916
Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>
Fix QMAP command packets TX to modem.
These packets needs to be sent to Q6_WAN_CONS pipe.
Change-Id: Ib718ad7308004ba7727e30e64f4b50bf4e521da3
CRs-Fixed: 2068048
Acked-by: Ady Abraham <adya@qti.qualcomm.com>
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
Use metadata information sent from userspace to configure sink.
This info shall be used later on to program the HDMI specific
infoframe registers.
Change-Id: I26634452d8c3ab7ab49a65e89ad52a3961c64855
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
apq8098-mediabox form factor does not support headset detection, and
detection pin is floating. Hence change headset jack type to normally
open to avoid fake mbhc interrupts.
Change-Id: I0798ec425ee97f75a243462273fe84de8ed63ee3
Signed-off-by: Ramprasad Katkam <katkam@codeaurora.org>
Currently checking the IPIs even on cores which are hotplugged out
successfully. This check should happen only for cores which are
online.
Change-Id: I8fe49638f308eab97455e7cca62b01b617596de4
Signed-off-by: Naresh Malladi <namall@codeaurora.org>
Pointer from userspace is de-referenced before the command is checked.
This might cause a crash if the command being sent is not a valid command.
Hence changing the de-reference such that the pointer is accessed after
checking if a valid command is sent from the userspace.
Change-Id: I731a015c952d131187a47a8d346fb6478fddeeb1
Signed-off-by: Samyukta Mogily <smogily@codeaurora.org>
Enable multichannel bit for SCO Rx to fix random 0 bytes
insertion in SCO.
CRs-Fixed: 2063152
Change-Id: I6abe986251d042ef70701b614b8cef0ee1e30044
Signed-off-by: Satish Kodishala <skodisha@codeaurora.org>
SDE drm driver should support the default color
component order instead of operating system
specific order. For opensource compositor; it will
use default color component order while android
compositors will take care of reversing the color
component order.
Change-Id: I61b953ce892834453e92a8c2cfdcb427456966bb
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Patch adds RGB 10bit both linear and compressed, P010 linear and
and TP10 compressed pixel formats to plane and writeback capabilities.
Change-Id: Ib5a0b2dacbc1ddc47c069b4348c0d1b9fbd7701e
Signed-off-by: Alexander Beykun <abeykun@codeaurora.org>
Currently for NV12 linear/compressed format if the same gem
object assigned to both planes, total size becomes twice more
than actually allocated. In that case kernel cannot detect
case where meta data planes not allocated for NV12 compressed
buffer and smmu fault happens. Current patch sums sizes only
for different gem objects allowing kernel to detect insufficient
memory allocation for NV12 case.
Change-Id: I0d9f49b8b310f0dff1fb787b4ba821a6d4a68140
Signed-off-by: Alexander Beykun <abeykun@codeaurora.org>
Patch changes type of pixel format flags from u32 to bitmap.
Change-Id: I117f3737d78d22b9bd6d78abdb8e96f52fc4e874
Signed-off-by: Alexander Beykun <abeykun@codeaurora.org>
Add MOD_QCOM_TIGHT modifier on top of DRM_FORMAT_NV12
base pixel format and update plane size calculation
to support compressed tp10 buffers.
Change-Id: I12eb9fecfd34d488eda92f6217b6ca51e466c6f6
Signed-off-by: Alexander Beykun <abeykun@codeaurora.org>
Add MOD_QCOM_DX modifier on top of DRM_FORMAT_NV12
base format and update plane size calculation to support
linear and compressed p010 buffers.
Change-Id: I93bd9557e5c4a4a038891f24730edbbec1dba262
Signed-off-by: Alexander Beykun <abeykun@codeaurora.org>
Populate HDR sink capabilities to a DRM blob.
These capabilities shall be used by the userspace
to calculate the sink HDR properties and setting them.
Change-Id: I7c2dbca375c456052ad73889b011553090bcf8f1
Signed-off-by: Srikanth Rajagopalan <rasrik@codeaurora.org>
Adding /lib64/firmware to the driver for loading firmware from
the target.
Change-Id: I1e489efc7e0d56991a0671950b88ce15afe3825b
Signed-off-by: Bharathraj Nagaraju <snbraj@codeaurora.org>
GSI MHI event ring error is a fatal error where there is
no recovery possible. Data path will be stalled.
This change will assert on this case.
Change-Id: I9c94e44b2f2d5e1b0b8d059b871d1bd9ad2d3fcf
Signed-off-by: Ghanim Fodi <gfodi@codeaurora.org>
Ringing IPA MHI event ring doorbell is done at MHI device
during MHI channel start. This is done after the rings
are allocated. The ring write pointer updated by the host is
used as the doorbell value. Doorbell ringing is required
in order to supply event credits to GSI H/W.
Change-Id: I2db110b4f99c8ab6c6878d426b3ebb37149b0b76
Signed-off-by: Ghanim Fodi <gfodi@codeaurora.org>
In case of failure to send QMI message to modem
remove the delay from AP since modem is probably
down (SSR\reboot).
Change-Id: Iae4d5162d39cd05f5c50d75087ec90dfe04a6c43
Signed-off-by: Amir Levy <alevy@codeaurora.org>
Defines the non-removable property for ufs/emmc device node
This basically lets the driver whether ufs/emmc is the boot
device
Change-Id: I7e583e0ecef064d1ed91b443fe35f98a3b2c0c8a
Signed-off-by: Lei wang <leiwan@codeaurora.org>
